Searched hist:"4 fb7090e72617f87ceb118a61bff8f393cdb31c1" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | cortex_a510.h | 4fb7090e72617f87ceb118a61bff8f393cdb31c1 Fri Aug 29 22:50:30 UTC 2025 John Powell <john.powell@arm.com> fix(cpus): workaround for Cortex-A510 erratum 2420992
Cortex-A510 erratum 2420992 is a Cat B erratum that applies only to
revisions r1p0 and r1p1, and is fixed in r1p1.
The workaround is to set bit 3 in CPUACTLR3_EL1 which will have no
performance impact, but will increase power consumption by 0.3-0.5%.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1873361/latest/
Change-Id: Ia76ba2431d76f14c08b95a998806986190d682c3
Signed-off-by: John Powell <john.powell@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_a510.S | 4fb7090e72617f87ceb118a61bff8f393cdb31c1 Fri Aug 29 22:50:30 UTC 2025 John Powell <john.powell@arm.com> fix(cpus): workaround for Cortex-A510 erratum 2420992
Cortex-A510 erratum 2420992 is a Cat B erratum that applies only to
revisions r1p0 and r1p1, and is fixed in r1p1.
The workaround is to set bit 3 in CPUACTLR3_EL1 which will have no
performance impact, but will increase power consumption by 0.3-0.5%.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1873361/latest/
Change-Id: Ia76ba2431d76f14c08b95a998806986190d682c3
Signed-off-by: John Powell <john.powell@arm.com>
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | 4fb7090e72617f87ceb118a61bff8f393cdb31c1 Fri Aug 29 22:50:30 UTC 2025 John Powell <john.powell@arm.com> fix(cpus): workaround for Cortex-A510 erratum 2420992
Cortex-A510 erratum 2420992 is a Cat B erratum that applies only to
revisions r1p0 and r1p1, and is fixed in r1p1.
The workaround is to set bit 3 in CPUACTLR3_EL1 which will have no
performance impact, but will increase power consumption by 0.3-0.5%.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1873361/latest/
Change-Id: Ia76ba2431d76f14c08b95a998806986190d682c3
Signed-off-by: John Powell <john.powell@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | 4fb7090e72617f87ceb118a61bff8f393cdb31c1 Fri Aug 29 22:50:30 UTC 2025 John Powell <john.powell@arm.com> fix(cpus): workaround for Cortex-A510 erratum 2420992
Cortex-A510 erratum 2420992 is a Cat B erratum that applies only to
revisions r1p0 and r1p1, and is fixed in r1p1.
The workaround is to set bit 3 in CPUACTLR3_EL1 which will have no
performance impact, but will increase power consumption by 0.3-0.5%.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1873361/latest/
Change-Id: Ia76ba2431d76f14c08b95a998806986190d682c3
Signed-off-by: John Powell <john.powell@arm.com>
|