Searched hist:"48255 f52764b64f35a268e4e87f2c3a621741836" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/cpu/armv8/zynqmp/ |
| H A D | spl.c | 48255f52764b64f35a268e4e87f2c3a621741836 Mon Aug 15 07:41:36 UTC 2016 Michal Simek <michal.simek@xilinx.com> ARM64: zynqmp: Add support for USB ulpi phy reset via mode pins
Mode pins can be used as output for reset. Xilinx boards are using
this feature as additional way how to reset USB phys and also others
chips on the boards.
Mode1 is used on all these boards for this feature.
Let SPL toggle reset on this pin by default.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-zynqmp/ |
| H A D | hardware.h | 48255f52764b64f35a268e4e87f2c3a621741836 Mon Aug 15 07:41:36 UTC 2016 Michal Simek <michal.simek@xilinx.com> ARM64: zynqmp: Add support for USB ulpi phy reset via mode pins
Mode pins can be used as output for reset. Xilinx boards are using
this feature as additional way how to reset USB phys and also others
chips on the boards.
Mode1 is used on all these boards for this feature.
Let SPL toggle reset on this pin by default.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|