Searched hist:"4518 cdc1ff64614942239f40568baa603fb1d101" (Results 1 – 5 of 5) sorted by relevance
| /optee_os/core/arch/arm/plat-rcar/ |
| H A D | conf.mk | 4518cdc1ff64614942239f40568baa603fb1d101 Tue Jan 14 18:41:55 UTC 2020 Jens Wiklander <jens.wiklander@linaro.org> core: arm64: introduce CFG_CORE_ARM64_PA_BITS
Introduces CFG_CORE_ARM64_PA_BITS which replaces the max_pa global
variable which was used to configure TCR_EL1.IPS.
Prior to 520860f ("core: generic_entry: add enable_mmu()") TCR_EL1.IPS
was calculated and even updated later in the boot flow to automatically
cover the needed physical address space. But now it's calculated before
MMU is enabled and once MMU it's kept in read only memory.
With CFG_CORE_ARM64_PA_BITS TCR_EL1.IPS can be determined early and
later it is enough to check that physical addresses to be mapped are
covered by CFG_CORE_ARM64_PA_BITS.
Fixes: 520860f658be ("core: generic_entry: add enable_mmu()")
Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
|
| /optee_os/core/arch/arm/plat-vexpress/ |
| H A D | conf.mk | 4518cdc1ff64614942239f40568baa603fb1d101 Tue Jan 14 18:41:55 UTC 2020 Jens Wiklander <jens.wiklander@linaro.org> core: arm64: introduce CFG_CORE_ARM64_PA_BITS
Introduces CFG_CORE_ARM64_PA_BITS which replaces the max_pa global
variable which was used to configure TCR_EL1.IPS.
Prior to 520860f ("core: generic_entry: add enable_mmu()") TCR_EL1.IPS
was calculated and even updated later in the boot flow to automatically
cover the needed physical address space. But now it's calculated before
MMU is enabled and once MMU it's kept in read only memory.
With CFG_CORE_ARM64_PA_BITS TCR_EL1.IPS can be determined early and
later it is enough to check that physical addresses to be mapped are
covered by CFG_CORE_ARM64_PA_BITS.
Fixes: 520860f658be ("core: generic_entry: add enable_mmu()")
Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
|
| /optee_os/core/arch/arm/mm/ |
| H A D | core_mmu_lpae.c | 4518cdc1ff64614942239f40568baa603fb1d101 Tue Jan 14 18:41:55 UTC 2020 Jens Wiklander <jens.wiklander@linaro.org> core: arm64: introduce CFG_CORE_ARM64_PA_BITS
Introduces CFG_CORE_ARM64_PA_BITS which replaces the max_pa global
variable which was used to configure TCR_EL1.IPS.
Prior to 520860f ("core: generic_entry: add enable_mmu()") TCR_EL1.IPS
was calculated and even updated later in the boot flow to automatically
cover the needed physical address space. But now it's calculated before
MMU is enabled and once MMU it's kept in read only memory.
With CFG_CORE_ARM64_PA_BITS TCR_EL1.IPS can be determined early and
later it is enough to check that physical addresses to be mapped are
covered by CFG_CORE_ARM64_PA_BITS.
Fixes: 520860f658be ("core: generic_entry: add enable_mmu()")
Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
|
| H A D | core_mmu.c | 4518cdc1ff64614942239f40568baa603fb1d101 Tue Jan 14 18:41:55 UTC 2020 Jens Wiklander <jens.wiklander@linaro.org> core: arm64: introduce CFG_CORE_ARM64_PA_BITS
Introduces CFG_CORE_ARM64_PA_BITS which replaces the max_pa global
variable which was used to configure TCR_EL1.IPS.
Prior to 520860f ("core: generic_entry: add enable_mmu()") TCR_EL1.IPS
was calculated and even updated later in the boot flow to automatically
cover the needed physical address space. But now it's calculated before
MMU is enabled and once MMU it's kept in read only memory.
With CFG_CORE_ARM64_PA_BITS TCR_EL1.IPS can be determined early and
later it is enough to check that physical addresses to be mapped are
covered by CFG_CORE_ARM64_PA_BITS.
Fixes: 520860f658be ("core: generic_entry: add enable_mmu()")
Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
|
| /optee_os/core/arch/arm/ |
| H A D | arm.mk | 4518cdc1ff64614942239f40568baa603fb1d101 Tue Jan 14 18:41:55 UTC 2020 Jens Wiklander <jens.wiklander@linaro.org> core: arm64: introduce CFG_CORE_ARM64_PA_BITS
Introduces CFG_CORE_ARM64_PA_BITS which replaces the max_pa global
variable which was used to configure TCR_EL1.IPS.
Prior to 520860f ("core: generic_entry: add enable_mmu()") TCR_EL1.IPS
was calculated and even updated later in the boot flow to automatically
cover the needed physical address space. But now it's calculated before
MMU is enabled and once MMU it's kept in read only memory.
With CFG_CORE_ARM64_PA_BITS TCR_EL1.IPS can be determined early and
later it is enough to check that physical addresses to be mapped are
covered by CFG_CORE_ARM64_PA_BITS.
Fixes: 520860f658be ("core: generic_entry: add enable_mmu()")
Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
|