Home
last modified time | relevance | path

Searched hist:"4467348 b63e02fde9a823bd476e50bc281ed63f7" (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/include/lib/cpus/aarch64/
H A Dcortex_a710.h4467348b63e02fde9a823bd476e50bc281ed63f7 Mon Jun 09 18:14:33 UTC 2025 John Powell <john.powell@arm.com> fix(cpus): workaround for Cortex-A710 erratum 1901946

Cortex-A710 erratum 1901946 is a Cat B erratum that applies
to revision r1p0 and is fixed in r2p0.

The workaround is to set CPUACTLR4_EL1[15]. This has a slight
performance impact.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1775101

Change-Id: I703f0e6ee122e44a9bc284d90f1465039e3b40e4
Signed-off-by: John Powell <john.powell@arm.com>
/rk3399_ARM-atf/lib/cpus/aarch64/
H A Dcortex_a710.S4467348b63e02fde9a823bd476e50bc281ed63f7 Mon Jun 09 18:14:33 UTC 2025 John Powell <john.powell@arm.com> fix(cpus): workaround for Cortex-A710 erratum 1901946

Cortex-A710 erratum 1901946 is a Cat B erratum that applies
to revision r1p0 and is fixed in r2p0.

The workaround is to set CPUACTLR4_EL1[15]. This has a slight
performance impact.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1775101

Change-Id: I703f0e6ee122e44a9bc284d90f1465039e3b40e4
Signed-off-by: John Powell <john.powell@arm.com>
/rk3399_ARM-atf/docs/design/
H A Dcpu-specific-build-macros.rst4467348b63e02fde9a823bd476e50bc281ed63f7 Mon Jun 09 18:14:33 UTC 2025 John Powell <john.powell@arm.com> fix(cpus): workaround for Cortex-A710 erratum 1901946

Cortex-A710 erratum 1901946 is a Cat B erratum that applies
to revision r1p0 and is fixed in r2p0.

The workaround is to set CPUACTLR4_EL1[15]. This has a slight
performance impact.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1775101

Change-Id: I703f0e6ee122e44a9bc284d90f1465039e3b40e4
Signed-off-by: John Powell <john.powell@arm.com>
/rk3399_ARM-atf/lib/cpus/
H A Dcpu-ops.mk4467348b63e02fde9a823bd476e50bc281ed63f7 Mon Jun 09 18:14:33 UTC 2025 John Powell <john.powell@arm.com> fix(cpus): workaround for Cortex-A710 erratum 1901946

Cortex-A710 erratum 1901946 is a Cat B erratum that applies
to revision r1p0 and is fixed in r2p0.

The workaround is to set CPUACTLR4_EL1[15]. This has a slight
performance impact.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1775101

Change-Id: I703f0e6ee122e44a9bc284d90f1465039e3b40e4
Signed-off-by: John Powell <john.powell@arm.com>