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| H A D | cru_rk3128.h | 43ae10fd4b95785cda52ce9aff784e676d3b071b Fri Dec 01 23:19:14 UTC 2017 Philipp Tomsich <philipp.tomsich@theobroma-systems.com> UPSTREAM: rockchip: clk: rk3128: fix DCLK_VOP_DIV_CON_MASK
The DCLK_VOP_DIV_CON_MASK should cover only bits 8 through 15.
Fix this to remove an "integer-overflow on shifted constant" warning.
Fixes: 9246d9e ("rockchip: rk3128: add clock driver")
Change-Id: I6132623ce069ec6c6cd59a01580e795142864862
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 4fc495e9e2e497afee383294a6ee9212e9a8bd73)
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