Searched hist:"239 b04fa31647100c537852b4a3fc8bd47e33aa6" (Results 1 – 6 of 6) sorted by relevance
| /rk3399_ARM-atf/bl32/tsp/aarch64/ |
| H A D | tsp_exceptions.S | 239b04fa31647100c537852b4a3fc8bd47e33aa6 Fri May 09 19:49:17 UTC 2014 Soby Mathew <soby.mathew@arm.com> Non-Secure Interrupt support during Standard SMC processing in TSP
Implements support for Non Secure Interrupts preempting the
Standard SMC call in EL1. Whenever an IRQ is trapped in the
Secure world we securely handover to the Normal world
to process the interrupt. The normal world then issues
"resume" smc call to resume the previous interrupted SMC call.
Fixes ARM-software/tf-issues#105
Change-Id: I72b760617dee27438754cdfc9fe9bcf4cc024858
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| H A D | tsp_entrypoint.S | 239b04fa31647100c537852b4a3fc8bd47e33aa6 Fri May 09 19:49:17 UTC 2014 Soby Mathew <soby.mathew@arm.com> Non-Secure Interrupt support during Standard SMC processing in TSP
Implements support for Non Secure Interrupts preempting the
Standard SMC call in EL1. Whenever an IRQ is trapped in the
Secure world we securely handover to the Normal world
to process the interrupt. The normal world then issues
"resume" smc call to resume the previous interrupted SMC call.
Fixes ARM-software/tf-issues#105
Change-Id: I72b760617dee27438754cdfc9fe9bcf4cc024858
|
| /rk3399_ARM-atf/bl32/tsp/ |
| H A D | tsp_interrupt.c | 239b04fa31647100c537852b4a3fc8bd47e33aa6 Fri May 09 19:49:17 UTC 2014 Soby Mathew <soby.mathew@arm.com> Non-Secure Interrupt support during Standard SMC processing in TSP
Implements support for Non Secure Interrupts preempting the
Standard SMC call in EL1. Whenever an IRQ is trapped in the
Secure world we securely handover to the Normal world
to process the interrupt. The normal world then issues
"resume" smc call to resume the previous interrupted SMC call.
Fixes ARM-software/tf-issues#105
Change-Id: I72b760617dee27438754cdfc9fe9bcf4cc024858
|
| H A D | tsp_main.c | 239b04fa31647100c537852b4a3fc8bd47e33aa6 Fri May 09 19:49:17 UTC 2014 Soby Mathew <soby.mathew@arm.com> Non-Secure Interrupt support during Standard SMC processing in TSP
Implements support for Non Secure Interrupts preempting the
Standard SMC call in EL1. Whenever an IRQ is trapped in the
Secure world we securely handover to the Normal world
to process the interrupt. The normal world then issues
"resume" smc call to resume the previous interrupted SMC call.
Fixes ARM-software/tf-issues#105
Change-Id: I72b760617dee27438754cdfc9fe9bcf4cc024858
|
| /rk3399_ARM-atf/services/spd/tspd/ |
| H A D | tspd_private.h | 239b04fa31647100c537852b4a3fc8bd47e33aa6 Fri May 09 19:49:17 UTC 2014 Soby Mathew <soby.mathew@arm.com> Non-Secure Interrupt support during Standard SMC processing in TSP
Implements support for Non Secure Interrupts preempting the
Standard SMC call in EL1. Whenever an IRQ is trapped in the
Secure world we securely handover to the Normal world
to process the interrupt. The normal world then issues
"resume" smc call to resume the previous interrupted SMC call.
Fixes ARM-software/tf-issues#105
Change-Id: I72b760617dee27438754cdfc9fe9bcf4cc024858
|
| H A D | tspd_main.c | 239b04fa31647100c537852b4a3fc8bd47e33aa6 Fri May 09 19:49:17 UTC 2014 Soby Mathew <soby.mathew@arm.com> Non-Secure Interrupt support during Standard SMC processing in TSP
Implements support for Non Secure Interrupts preempting the
Standard SMC call in EL1. Whenever an IRQ is trapped in the
Secure world we securely handover to the Normal world
to process the interrupt. The normal world then issues
"resume" smc call to resume the previous interrupted SMC call.
Fixes ARM-software/tf-issues#105
Change-Id: I72b760617dee27438754cdfc9fe9bcf4cc024858
|