Searched hist:"217 a79c4c3cfe714cb1ce4d083bd8f174d1be93c" (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_a720.S | 217a79c4c3cfe714cb1ce4d083bd8f174d1be93c Tue Sep 30 23:53:38 UTC 2025 John Powell <john.powell@arm.com> fix(cpus): workaround for Cortex-A720 erratum 2729604
Cortex-A720 erratum 2729604 is a Cat B erratum that applies to
revisions r0p0 and r0p1, and is fixed in r0p2.
This workaround might impact performance of workloads heavily
relying on floating point division or square root operations.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-2439421
Change-Id: I4567d75ba9f17146d0d7bc5cdb622bb63efadc3c
Signed-off-by: John Powell <john.powell@arm.com>
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| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | 217a79c4c3cfe714cb1ce4d083bd8f174d1be93c Tue Sep 30 23:53:38 UTC 2025 John Powell <john.powell@arm.com> fix(cpus): workaround for Cortex-A720 erratum 2729604
Cortex-A720 erratum 2729604 is a Cat B erratum that applies to
revisions r0p0 and r0p1, and is fixed in r0p2.
This workaround might impact performance of workloads heavily
relying on floating point division or square root operations.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-2439421
Change-Id: I4567d75ba9f17146d0d7bc5cdb622bb63efadc3c
Signed-off-by: John Powell <john.powell@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | 217a79c4c3cfe714cb1ce4d083bd8f174d1be93c Tue Sep 30 23:53:38 UTC 2025 John Powell <john.powell@arm.com> fix(cpus): workaround for Cortex-A720 erratum 2729604
Cortex-A720 erratum 2729604 is a Cat B erratum that applies to
revisions r0p0 and r0p1, and is fixed in r0p2.
This workaround might impact performance of workloads heavily
relying on floating point division or square root operations.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-2439421
Change-Id: I4567d75ba9f17146d0d7bc5cdb622bb63efadc3c
Signed-off-by: John Powell <john.powell@arm.com>
|