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/rk3399_rockchip-uboot/include/configs/
H A Drk3368_common.h191d31cd1200e1b349bb44874943c286c0db8bb3 Tue Oct 22 10:17:51 UTC 2019 Kever Yang <kever.yang@rock-chips.com> rockchip: update CONFIG_SPL_MAX_SIZE to 0x40000

We are using DRAM offset 0~0x40000 as SPL text size, Note that BSS,
STACK and MALLOC may using separate space.

Change-Id: I1d9128b339140569e427fad44dc0a2f3058deaf0
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
H A Drk3328_common.h191d31cd1200e1b349bb44874943c286c0db8bb3 Tue Oct 22 10:17:51 UTC 2019 Kever Yang <kever.yang@rock-chips.com> rockchip: update CONFIG_SPL_MAX_SIZE to 0x40000

We are using DRAM offset 0~0x40000 as SPL text size, Note that BSS,
STACK and MALLOC may using separate space.

Change-Id: I1d9128b339140569e427fad44dc0a2f3058deaf0
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
H A Drk3399_common.h191d31cd1200e1b349bb44874943c286c0db8bb3 Tue Oct 22 10:17:51 UTC 2019 Kever Yang <kever.yang@rock-chips.com> rockchip: update CONFIG_SPL_MAX_SIZE to 0x40000

We are using DRAM offset 0~0x40000 as SPL text size, Note that BSS,
STACK and MALLOC may using separate space.

Change-Id: I1d9128b339140569e427fad44dc0a2f3058deaf0
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
H A Drk3288_common.h191d31cd1200e1b349bb44874943c286c0db8bb3 Tue Oct 22 10:17:51 UTC 2019 Kever Yang <kever.yang@rock-chips.com> rockchip: update CONFIG_SPL_MAX_SIZE to 0x40000

We are using DRAM offset 0~0x40000 as SPL text size, Note that BSS,
STACK and MALLOC may using separate space.

Change-Id: I1d9128b339140569e427fad44dc0a2f3058deaf0
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>