Searched hist:"133 fbfa9e6a81a59ab2d6848f0b111ebb2567a8a" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/ |
| H A D | cmd_errata.c | 133fbfa9e6a81a59ab2d6848f0b111ebb2567a8a Mon Sep 16 19:49:31 UTC 2013 York Sun <yorksun@freescale.com> powerpc/mpc85xx: Add workaround for erratum A006379
Erratum A006379 says CPCHDBCR0 bit field [10:14] has incorrect default
value after POR. The workaround is to set this field before enabling
CPC to 0x1e.
Erratum A006379 applies to
T4240 rev 1.0
B4860 rev 1.0, 2.0
Signed-off-by: York Sun <yorksun@freescale.com>
|
| H A D | cpu_init.c | 133fbfa9e6a81a59ab2d6848f0b111ebb2567a8a Mon Sep 16 19:49:31 UTC 2013 York Sun <yorksun@freescale.com> powerpc/mpc85xx: Add workaround for erratum A006379
Erratum A006379 says CPCHDBCR0 bit field [10:14] has incorrect default
value after POR. The workaround is to set this field before enabling
CPC to 0x1e.
Erratum A006379 applies to
T4240 rev 1.0
B4860 rev 1.0, 2.0
Signed-off-by: York Sun <yorksun@freescale.com>
|
| /rk3399_rockchip-uboot/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 133fbfa9e6a81a59ab2d6848f0b111ebb2567a8a Mon Sep 16 19:49:31 UTC 2013 York Sun <yorksun@freescale.com> powerpc/mpc85xx: Add workaround for erratum A006379
Erratum A006379 says CPCHDBCR0 bit field [10:14] has incorrect default
value after POR. The workaround is to set this field before enabling
CPC to 0x1e.
Erratum A006379 applies to
T4240 rev 1.0
B4860 rev 1.0, 2.0
Signed-off-by: York Sun <yorksun@freescale.com>
|
| H A D | config_mpc85xx.h | 133fbfa9e6a81a59ab2d6848f0b111ebb2567a8a Mon Sep 16 19:49:31 UTC 2013 York Sun <yorksun@freescale.com> powerpc/mpc85xx: Add workaround for erratum A006379
Erratum A006379 says CPCHDBCR0 bit field [10:14] has incorrect default
value after POR. The workaround is to set this field before enabling
CPC to 0x1e.
Erratum A006379 applies to
T4240 rev 1.0
B4860 rev 1.0, 2.0
Signed-off-by: York Sun <yorksun@freescale.com>
|