Searched hist:"0 dc78ff857337a82d39d7e4390e317ffbc93097f" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_rockchip-uboot/include/ |
| H A D | fsl_usb.h | 0dc78ff857337a82d39d7e4390e317ffbc93097f Fri Nov 21 11:55:21 UTC 2014 Nikhil Badola <nikhil.badola@freescale.com> drivers: usb: fsl: Workaround for Erratum A004477
Add a delay of 1 microsecond before issuing soft reset to the
controller to let ongoing ULPI transaction complete.
This prevents corruption of ULPI Function Control Register which
eventually prevents phy clock from entering to low power mode
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
| /rk3399_rockchip-uboot/drivers/usb/host/ |
| H A D | ehci-fsl.c | 0dc78ff857337a82d39d7e4390e317ffbc93097f Fri Nov 21 11:55:21 UTC 2014 Nikhil Badola <nikhil.badola@freescale.com> drivers: usb: fsl: Workaround for Erratum A004477
Add a delay of 1 microsecond before issuing soft reset to the
controller to let ongoing ULPI transaction complete.
This prevents corruption of ULPI Function Control Register which
eventually prevents phy clock from entering to low power mode
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/ |
| H A D | cmd_errata.c | 0dc78ff857337a82d39d7e4390e317ffbc93097f Fri Nov 21 11:55:21 UTC 2014 Nikhil Badola <nikhil.badola@freescale.com> drivers: usb: fsl: Workaround for Erratum A004477
Add a delay of 1 microsecond before issuing soft reset to the
controller to let ongoing ULPI transaction complete.
This prevents corruption of ULPI Function Control Register which
eventually prevents phy clock from entering to low power mode
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
| /rk3399_rockchip-uboot/arch/powerpc/include/asm/ |
| H A D | config_mpc85xx.h | 0dc78ff857337a82d39d7e4390e317ffbc93097f Fri Nov 21 11:55:21 UTC 2014 Nikhil Badola <nikhil.badola@freescale.com> drivers: usb: fsl: Workaround for Erratum A004477
Add a delay of 1 microsecond before issuing soft reset to the
controller to let ongoing ULPI transaction complete.
This prevents corruption of ULPI Function Control Register which
eventually prevents phy clock from entering to low power mode
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|