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H A Dfvp-base-gicv3-psci-dynamiq.dts0ad5b318f7e8e7ff35b5e607e3d11c31efeb3872 Thu Feb 13 21:36:50 UTC 2020 Madhukar Pappireddy <madhukar.pappireddy@arm.com> Fix topology description of cpus for DynamIQ based FVP

DynamIQ based designs have upto 8 CPUs in each cluster. This
patch fixes the device tree node which describes the topology
of the CPU for DynamIQ FVP Model.

Change-Id: I7146bc79029ce38314026d4853e5b6406863725c
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
H A Dfvp-base-gicv3-psci-dynamiq-2t.dts0ad5b318f7e8e7ff35b5e607e3d11c31efeb3872 Thu Feb 13 21:36:50 UTC 2020 Madhukar Pappireddy <madhukar.pappireddy@arm.com> Fix topology description of cpus for DynamIQ based FVP

DynamIQ based designs have upto 8 CPUs in each cluster. This
patch fixes the device tree node which describes the topology
of the CPU for DynamIQ FVP Model.

Change-Id: I7146bc79029ce38314026d4853e5b6406863725c
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>