Searched hist:"00 c1b8c721924540f33576c0c90278e9dd28d652" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/plat/intel/soc/agilex5/include/ |
| H A D | agilex5_system_manager.h | 00c1b8c721924540f33576c0c90278e9dd28d652 Thu Jul 10 07:14:21 UTC 2025 Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com> fix(intel): configure usb3 system manager reg in TFA
Reset pulse override bit needs to be set for successful
reset staggering pulse generation.
The bit one of power over-current field actually reflects
PIPE power present signal. This bit needs to be set to
avoid providing false information about VBus to the
HPS controller.
Change-Id: I123e2ec7c8ceaa15f47f90460fae5a325741dd10
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>
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| /rk3399_ARM-atf/plat/intel/soc/agilex5/ |
| H A D | bl2_plat_setup.c | 00c1b8c721924540f33576c0c90278e9dd28d652 Thu Jul 10 07:14:21 UTC 2025 Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com> fix(intel): configure usb3 system manager reg in TFA
Reset pulse override bit needs to be set for successful
reset staggering pulse generation.
The bit one of power over-current field actually reflects
PIPE power present signal. This bit needs to be set to
avoid providing false information about VBus to the
HPS controller.
Change-Id: I123e2ec7c8ceaa15f47f90460fae5a325741dd10
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>
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