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/OK3568_Linux_fs/kernel/drivers/pwm/
H A Dpwm-renesas-tpu.c3 * R-Mobile TPU PWM driver
72 struct tpu_device *tpu; member
73 unsigned int channel; /* Channel number in the TPU */
94 void __iomem *base = pwm->tpu->base + TPU_CHANNEL_OFFSET in tpu_pwm_write()
105 dev_dbg(&pwm->tpu->pdev->dev, "%u: configuring pin as %s\n", in tpu_pwm_set_pin()
132 spin_lock_irqsave(&pwm->tpu->lock, flags); in tpu_pwm_start_stop()
133 value = ioread16(pwm->tpu->base + TPU_TSTR); in tpu_pwm_start_stop()
140 iowrite16(value, pwm->tpu->base + TPU_TSTR); in tpu_pwm_start_stop()
141 spin_unlock_irqrestore(&pwm->tpu->lock, flags); in tpu_pwm_start_stop()
150 pm_runtime_get_sync(&pwm->tpu->pdev->dev); in tpu_pwm_timer_start()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pwm/
H A Drenesas,tpu-pwm.yaml4 $id: http://devicetree.org/schemas/pwm/renesas,tpu-pwm.yaml#
16 - renesas,tpu-r8a73a4 # R-Mobile APE6
17 - renesas,tpu-r8a7740 # R-Mobile A1
18 - renesas,tpu-r8a7742 # RZ/G1H
19 - renesas,tpu-r8a7743 # RZ/G1M
20 - renesas,tpu-r8a7744 # RZ/G1N
21 - renesas,tpu-r8a7745 # RZ/G1E
22 - renesas,tpu-r8a7790 # R-Car H2
23 - renesas,tpu-r8a7791 # R-Car M2-W
24 - renesas,tpu-r8a7792 # R-Car V2H
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/phy/rf/halrf_8852b/
H A Dhalrf_set_pwr_table_8852b.c65 struct rtw_tpu_info *tpu = &rf->hal_com->band[phy].rtw_tpu_i; in halrf_set_power_by_rate_to_struct_8852b() local
66 struct rtw_tpu_pwr_by_rate_info *rate = &tpu->rtw_tpu_pwr_by_rate_i; in halrf_set_power_by_rate_to_struct_8852b()
132 …tpu->pwr_ofst_mode[0] = halrf_get_power_by_rate(rf, phy, RF_PATH_A, RTW_DATA_RATE_HE_NSS1_MCS11, 0… in halrf_set_power_by_rate_to_struct_8852b()
133 …tpu->pwr_ofst_mode[1] = halrf_get_power_by_rate(rf, phy, RF_PATH_A, RTW_DATA_RATE_VHT_NSS1_MCS9, 0… in halrf_set_power_by_rate_to_struct_8852b()
134 tpu->pwr_ofst_mode[2] = halrf_get_power_by_rate(rf, phy, RF_PATH_A, RTW_DATA_RATE_MCS7, 0, 1) / 2; in halrf_set_power_by_rate_to_struct_8852b()
135 …tpu->pwr_ofst_mode[3] = halrf_get_power_by_rate(rf, phy, RF_PATH_A, RTW_DATA_RATE_OFDM54, 0, 1) / … in halrf_set_power_by_rate_to_struct_8852b()
136 tpu->pwr_ofst_mode[4] = halrf_get_power_by_rate(rf, phy, RF_PATH_A, RTW_DATA_RATE_CCK11, 0, 1) / 2; in halrf_set_power_by_rate_to_struct_8852b()
154 tpu->pwr_ofst_mode[4], in halrf_set_power_by_rate_to_struct_8852b()
155 tpu->pwr_ofst_mode[3], in halrf_set_power_by_rate_to_struct_8852b()
156 tpu->pwr_ofst_mode[2], in halrf_set_power_by_rate_to_struct_8852b()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/phy/rf/halrf_8852b/
H A Dhalrf_set_pwr_table_8852b.c65 struct rtw_tpu_info *tpu = &rf->hal_com->band[phy].rtw_tpu_i; in halrf_set_power_by_rate_to_struct_8852b() local
66 struct rtw_tpu_pwr_by_rate_info *rate = &tpu->rtw_tpu_pwr_by_rate_i; in halrf_set_power_by_rate_to_struct_8852b()
132 …tpu->pwr_ofst_mode[0] = halrf_get_power_by_rate(rf, phy, RF_PATH_A, RTW_DATA_RATE_HE_NSS1_MCS11, 0… in halrf_set_power_by_rate_to_struct_8852b()
133 …tpu->pwr_ofst_mode[1] = halrf_get_power_by_rate(rf, phy, RF_PATH_A, RTW_DATA_RATE_VHT_NSS1_MCS9, 0… in halrf_set_power_by_rate_to_struct_8852b()
134 tpu->pwr_ofst_mode[2] = halrf_get_power_by_rate(rf, phy, RF_PATH_A, RTW_DATA_RATE_MCS7, 0, 1) / 2; in halrf_set_power_by_rate_to_struct_8852b()
135 …tpu->pwr_ofst_mode[3] = halrf_get_power_by_rate(rf, phy, RF_PATH_A, RTW_DATA_RATE_OFDM54, 0, 1) / … in halrf_set_power_by_rate_to_struct_8852b()
136 tpu->pwr_ofst_mode[4] = halrf_get_power_by_rate(rf, phy, RF_PATH_A, RTW_DATA_RATE_CCK11, 0, 1) / 2; in halrf_set_power_by_rate_to_struct_8852b()
154 tpu->pwr_ofst_mode[4], in halrf_set_power_by_rate_to_struct_8852b()
155 tpu->pwr_ofst_mode[3], in halrf_set_power_by_rate_to_struct_8852b()
156 tpu->pwr_ofst_mode[2], in halrf_set_power_by_rate_to_struct_8852b()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/phy/bb/
H A Dhalbb_pwr_ctrl.c556 struct rtw_tpu_info *tpu = &bb->hal_com->band[bb->bb_phy_idx].rtw_tpu_i; in halbb_pwr_dbg()
557 struct rtw_tpu_pwr_by_rate_info *by_rate = &tpu->rtw_tpu_pwr_by_rate_i; in halbb_pwr_dbg()
558 struct rtw_tpu_pwr_imt_info *lmt = &tpu->rtw_tpu_pwr_imt_i; in halbb_pwr_dbg()
596 "tpu 0\n"); in halbb_pwr_dbg()
600 if (_os_strcmp(input[1], "tpu") == 0) { in halbb_pwr_dbg()
608 "Set all TPU component\n"); in halbb_pwr_dbg()
613 "dbg_en=%d, Locking driver set TPU = %d\n", val[0], tpu->normal_mode_lock_en); in halbb_pwr_dbg()
620 "%-10s {%d}\n", "[base_cw_0db]", tpu->base_cw_0db); in halbb_pwr_dbg()
624 halbb_print_sign_frac_digit2(bb, tpu->ofst_int, 8, 3)); in halbb_pwr_dbg()
628 halbb_print_sign_frac_digit2(bb, tpu->ref_pow_cck, 16, 2), in halbb_pwr_dbg()
[all …]
H A Dhalbb_ul_tb_ctrl.c32 struct rtw_tpu_info *tpu = &bb->hal_com->band[bb->bb_phy_idx].rtw_tpu_i; in halbb_ul_tb_reset() local
38 tpu->tx_ptrn_shap_idx = bb_ul_tb->def_tri_idx; in halbb_ul_tb_reset()
47 struct rtw_tpu_info *tpu = &bb->hal_com->band[bb->bb_phy_idx].rtw_tpu_i; in halbb_ul_tb_chk() local
52 bb_ul_tb->def_tri_idx = tpu->tx_ptrn_shap_idx; in halbb_ul_tb_chk()
72 struct rtw_tpu_info *tpu = &bb->hal_com->band[bb->bb_phy_idx].rtw_tpu_i; in halbb_ul_tb_ctrl() local
133 tpu->tx_ptrn_shap_idx = 0; in halbb_ul_tb_ctrl()
136 tpu->tx_ptrn_shap_idx = bb_ul_tb->def_tri_idx; in halbb_ul_tb_ctrl()
137 BB_DBG(bb, DBG_UL_TB_CTRL, "Default tx_ptrn_shap_idx = %d\n", tpu->tx_ptrn_shap_idx); in halbb_ul_tb_ctrl()
H A Dhalbb_api.c1734 struct rtw_tpu_info *tpu = &bb->hal_com->band[phy_idx].rtw_tpu_i; in halbb_set_tx_pow_pattern_shap() local
1735 u8 shape_idx = tpu->tx_ptrn_shap_idx; in halbb_set_tx_pow_pattern_shap()
1771 struct rtw_tpu_info *tpu = &bb->hal_com->band[phy_idx].rtw_tpu_i; in halbb_set_tx_pow_ref() local
1780 halbb_set_tx_pow_ref_8852a_2(bb, tpu->ref_pow_ofdm, in halbb_set_tx_pow_ref()
1781 tpu->ref_pow_cck, in halbb_set_tx_pow_ref()
1782 tpu->ofst_int, in halbb_set_tx_pow_ref()
1783 tpu->base_cw_0db, in halbb_set_tx_pow_ref()
1784 tpu->tssi_16dBm_cw, in halbb_set_tx_pow_ref()
1785 &tpu->ref_pow_ofdm_cw, in halbb_set_tx_pow_ref()
1786 &tpu->ref_pow_cck_cw, in halbb_set_tx_pow_ref()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/phy/bb/
H A Dhalbb_pwr_ctrl.c556 struct rtw_tpu_info *tpu = &bb->hal_com->band[bb->bb_phy_idx].rtw_tpu_i; in halbb_pwr_dbg()
557 struct rtw_tpu_pwr_by_rate_info *by_rate = &tpu->rtw_tpu_pwr_by_rate_i; in halbb_pwr_dbg()
558 struct rtw_tpu_pwr_imt_info *lmt = &tpu->rtw_tpu_pwr_imt_i; in halbb_pwr_dbg()
596 "tpu 0\n"); in halbb_pwr_dbg()
600 if (_os_strcmp(input[1], "tpu") == 0) { in halbb_pwr_dbg()
608 "Set all TPU component\n"); in halbb_pwr_dbg()
613 "dbg_en=%d, Locking driver set TPU = %d\n", val[0], tpu->normal_mode_lock_en); in halbb_pwr_dbg()
620 "%-10s {%d}\n", "[base_cw_0db]", tpu->base_cw_0db); in halbb_pwr_dbg()
624 halbb_print_sign_frac_digit2(bb, tpu->ofst_int, 8, 3)); in halbb_pwr_dbg()
628 halbb_print_sign_frac_digit2(bb, tpu->ref_pow_cck, 16, 2), in halbb_pwr_dbg()
[all …]
H A Dhalbb_ul_tb_ctrl.c32 struct rtw_tpu_info *tpu = &bb->hal_com->band[bb->bb_phy_idx].rtw_tpu_i; in halbb_ul_tb_reset() local
38 tpu->tx_ptrn_shap_idx = bb_ul_tb->def_tri_idx; in halbb_ul_tb_reset()
47 struct rtw_tpu_info *tpu = &bb->hal_com->band[bb->bb_phy_idx].rtw_tpu_i; in halbb_ul_tb_chk() local
52 bb_ul_tb->def_tri_idx = tpu->tx_ptrn_shap_idx; in halbb_ul_tb_chk()
72 struct rtw_tpu_info *tpu = &bb->hal_com->band[bb->bb_phy_idx].rtw_tpu_i; in halbb_ul_tb_ctrl() local
133 tpu->tx_ptrn_shap_idx = 0; in halbb_ul_tb_ctrl()
136 tpu->tx_ptrn_shap_idx = bb_ul_tb->def_tri_idx; in halbb_ul_tb_ctrl()
137 BB_DBG(bb, DBG_UL_TB_CTRL, "Default tx_ptrn_shap_idx = %d\n", tpu->tx_ptrn_shap_idx); in halbb_ul_tb_ctrl()
H A Dhalbb_api.c1734 struct rtw_tpu_info *tpu = &bb->hal_com->band[phy_idx].rtw_tpu_i; in halbb_set_tx_pow_pattern_shap() local
1735 u8 shape_idx = tpu->tx_ptrn_shap_idx; in halbb_set_tx_pow_pattern_shap()
1771 struct rtw_tpu_info *tpu = &bb->hal_com->band[phy_idx].rtw_tpu_i; in halbb_set_tx_pow_ref() local
1780 halbb_set_tx_pow_ref_8852a_2(bb, tpu->ref_pow_ofdm, in halbb_set_tx_pow_ref()
1781 tpu->ref_pow_cck, in halbb_set_tx_pow_ref()
1782 tpu->ofst_int, in halbb_set_tx_pow_ref()
1783 tpu->base_cw_0db, in halbb_set_tx_pow_ref()
1784 tpu->tssi_16dBm_cw, in halbb_set_tx_pow_ref()
1785 &tpu->ref_pow_ofdm_cw, in halbb_set_tx_pow_ref()
1786 &tpu->ref_pow_cck_cw, in halbb_set_tx_pow_ref()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/timer/
H A Drenesas,tpu.txt3 The TPU is a 16bit timer/counter with configurable clock inputs and
9 - compatible: must contain "renesas,tpu"
16 tpu: tpu@ffffe0 {
17 compatible = "renesas,tpu";
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/mac/mac_ax/
H A Dhw.c2010 u8 band, struct rtw_tpu_info *tpu) in mac_write_pwr_ofst_mode() argument
2017 s8 *tmp = &tpu->pwr_ofst_mode[0]; in mac_write_pwr_ofst_mode()
2030 s8 *tmp = &tpu->pwr_ofst_mode[0]; in mac_write_pwr_ofst_mode()
2041 u8 band, struct rtw_tpu_info *tpu) in mac_write_pwr_ofst_bw() argument
2048 s8 *tmp = &tpu->pwr_ofst_bw[0]; in mac_write_pwr_ofst_bw()
2061 s8 *tmp = &tpu->pwr_ofst_bw[0]; in mac_write_pwr_ofst_bw()
2072 u8 band, struct rtw_tpu_info *tpu) in mac_write_pwr_ref_reg() argument
2080 val32 |= (((tpu->ref_pow_ofdm & 0x1ff) << 9) | in mac_write_pwr_ref_reg()
2081 ((tpu->ref_pow_cck & 0x1ff))); in mac_write_pwr_ref_reg()
2094 val32 |= (((tpu->ref_pow_ofdm & 0x1ff) << 19) | in mac_write_pwr_ref_reg()
[all …]
H A Dhw.h601 * @param *tpu
606 u8 band, struct rtw_tpu_info *tpu);
624 * @param *tpu
629 u8 band, struct rtw_tpu_info *tpu);
647 * @param *tpu
652 u8 band, struct rtw_tpu_info *tpu);
670 * @param *tpu
675 u8 band, struct rtw_tpu_info *tpu);
693 * @param *tpu
698 u8 band, struct rtw_tpu_info *tpu);
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/mac/mac_ax/
H A Dhw.c2010 u8 band, struct rtw_tpu_info *tpu) in mac_write_pwr_ofst_mode() argument
2017 s8 *tmp = &tpu->pwr_ofst_mode[0]; in mac_write_pwr_ofst_mode()
2030 s8 *tmp = &tpu->pwr_ofst_mode[0]; in mac_write_pwr_ofst_mode()
2041 u8 band, struct rtw_tpu_info *tpu) in mac_write_pwr_ofst_bw() argument
2048 s8 *tmp = &tpu->pwr_ofst_bw[0]; in mac_write_pwr_ofst_bw()
2061 s8 *tmp = &tpu->pwr_ofst_bw[0]; in mac_write_pwr_ofst_bw()
2072 u8 band, struct rtw_tpu_info *tpu) in mac_write_pwr_ref_reg() argument
2080 val32 |= (((tpu->ref_pow_ofdm & 0x1ff) << 9) | in mac_write_pwr_ref_reg()
2081 ((tpu->ref_pow_cck & 0x1ff))); in mac_write_pwr_ref_reg()
2094 val32 |= (((tpu->ref_pow_ofdm & 0x1ff) << 19) | in mac_write_pwr_ref_reg()
[all …]
H A Dhw.h601 * @param *tpu
606 u8 band, struct rtw_tpu_info *tpu);
624 * @param *tpu
629 u8 band, struct rtw_tpu_info *tpu);
647 * @param *tpu
652 u8 band, struct rtw_tpu_info *tpu);
670 * @param *tpu
675 u8 band, struct rtw_tpu_info *tpu);
693 * @param *tpu
698 u8 band, struct rtw_tpu_info *tpu);
[all …]
/OK3568_Linux_fs/kernel/arch/sh/kernel/cpu/sh3/
H A Dsetup-sh7720.c230 PINT07, PINT815, TPU, IIC, enumerator
257 INTC_VECT(SIOF1, 0xd20), INTC_VECT(TPU, 0xd80),
258 INTC_VECT(TPU, 0xda0), INTC_VECT(TPU, 0xdc0),
259 INTC_VECT(TPU, 0xde0), INTC_VECT(IIC, 0xe00),
274 { 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } },
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/power/
H A Drenesas,sysc-rmobile.txt94 tpu: pwm@e6600000 {
95 compatible = "renesas,tpu-r8a7740", "renesas,tpu";
/OK3568_Linux_fs/kernel/drivers/staging/gasket/
H A DKconfig18 This driver supports the Apex Edge TPU device. See
19 https://cloud.google.com/edge-tpu/ for more information.
/OK3568_Linux_fs/kernel/arch/h8300/boot/dts/
H A Dh8s_sim.dts71 tpu: timer@ffffe0 { label
72 compatible = "renesas,tpu";
H A Dedosk2674.dts72 tpu: timer@ffffe0 { label
73 compatible = "renesas,tpu";
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dr8a7745-iwg22d-sodimm.dts58 pwms = <&tpu 3 5000000 PWM_POLARITY_INVERTED>;
231 function = "tpu";
319 &tpu {
/OK3568_Linux_fs/kernel/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7343.c313 MFI, VPU, TPU, Z3D4, USBI0, USBI1, enumerator
344 INTC_VECT(TPU, 0x9a0), INTC_VECT(Z3D4, 0x9e0),
403 { I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI, TPU, 0, 0, TSIF } },
418 { 0xa408002c, 0, 16, 4, /* IPRL */ { 0, 0, TPU } },
H A Dsetup-sh7763.c244 USBH, USBF, TPU, PCC, MMCIF, SIM, enumerator
281 INTC_VECT(TPU, 0xcc0), INTC_VECT(PCC, 0xce0),
310 PCC, 0, 0, ADC, TPU, SIM, SIOF2, SIOF1,
328 { 0xffd400a8, 0, 32, 8, /* INT2PRI10 */ { TPU, SIM, SIOF2, SIOF1 } },
/OK3568_Linux_fs/kernel/drivers/clocksource/
H A Dh8300_tpu.c3 * H8S TPU Driver
158 TIMER_OF_DECLARE(h8300_tpu, "renesas,tpu", h8300_tpu_init);
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/
H A Dhal_def.h881 /*[TX Power Unit(TPU) array size]*/
941 struct rtw_tpu_pwr_by_rate_info { /*TX Power Unit (TPU)*/
946 struct rtw_tpu_ext_pwr_lmt_info { /*TX Power Unit (TPU)*/
954 struct rtw_tpu_pwr_imt_info { /*TX Power Unit (TPU)*/
966 struct rtw_tpu_info { /*TX Power Unit (TPU)*/
967 enum rtw_tpu_op_mode op_mode; /*In debug mode, only debug tool control TPU APIs*/
1019 struct rtw_tpu_info rtw_tpu_i; /*TX Power Unit (TPU)*/

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