1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree Source for the iWave-RZG1E SODIMM carrier board 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2017 Renesas Electronics Corp. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/* 9*4882a593Smuzhiyun * SSI-SGTL5000 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * This command is required when Playback/Capture 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * amixer set "DVC Out" 100% 14*4882a593Smuzhiyun * amixer set "DVC In" 100% 15*4882a593Smuzhiyun * 16*4882a593Smuzhiyun * You can use Mute 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * amixer set "DVC Out Mute" on 19*4882a593Smuzhiyun * amixer set "DVC In Mute" on 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * You can use Volume Ramp 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" 24*4882a593Smuzhiyun * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" 25*4882a593Smuzhiyun * amixer set "DVC Out Ramp" on 26*4882a593Smuzhiyun * aplay xxx.wav & 27*4882a593Smuzhiyun * amixer set "DVC Out" 80% // Volume Down 28*4882a593Smuzhiyun * amixer set "DVC Out" 100% // Volume Up 29*4882a593Smuzhiyun */ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun/dts-v1/; 32*4882a593Smuzhiyun#include "r8a7745-iwg22m.dtsi" 33*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun/ { 36*4882a593Smuzhiyun model = "iWave Systems RainboW-G22D-SODIMM board based on RZ/G1E"; 37*4882a593Smuzhiyun compatible = "iwave,g22d", "iwave,g22m", "renesas,r8a7745"; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun aliases { 40*4882a593Smuzhiyun ethernet0 = &avb; 41*4882a593Smuzhiyun serial3 = &scif4; 42*4882a593Smuzhiyun serial5 = &hscif1; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun chosen { 46*4882a593Smuzhiyun bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 47*4882a593Smuzhiyun stdout-path = "serial3:115200n8"; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun audio_clock: audio_clock { 51*4882a593Smuzhiyun compatible = "fixed-clock"; 52*4882a593Smuzhiyun #clock-cells = <0>; 53*4882a593Smuzhiyun clock-frequency = <26000000>; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun backlight_lcd: backlight { 57*4882a593Smuzhiyun compatible = "pwm-backlight"; 58*4882a593Smuzhiyun pwms = <&tpu 3 5000000 PWM_POLARITY_INVERTED>; 59*4882a593Smuzhiyun brightness-levels = <0 4 8 16 32 64 128 255>; 60*4882a593Smuzhiyun default-brightness-level = <7>; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun lcd_panel: lcd { 64*4882a593Smuzhiyun compatible = "edt,etm043080dh6gp"; 65*4882a593Smuzhiyun power-supply = <&vccq_panel>; 66*4882a593Smuzhiyun backlight = <&backlight_lcd>; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun port { 69*4882a593Smuzhiyun lcd_in: endpoint { 70*4882a593Smuzhiyun remote-endpoint = <&du_out_rgb0>; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun vccq_panel: regulator-vccq-panel { 76*4882a593Smuzhiyun compatible = "regulator-fixed"; 77*4882a593Smuzhiyun regulator-name = "Panel VccQ"; 78*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 79*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 80*4882a593Smuzhiyun gpio = <&gpio1 13 GPIO_ACTIVE_LOW>; 81*4882a593Smuzhiyun enable-active-high; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun vccq_sdhi0: regulator-vccq-sdhi0 { 85*4882a593Smuzhiyun compatible = "regulator-gpio"; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun regulator-name = "SDHI0 VccQ"; 88*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 89*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; 92*4882a593Smuzhiyun gpios-states = <1>; 93*4882a593Smuzhiyun states = <3300000 1>, <1800000 0>; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun rsnd_sgtl5000: sound { 97*4882a593Smuzhiyun compatible = "simple-audio-card"; 98*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 99*4882a593Smuzhiyun simple-audio-card,bitclock-master = <&sndcodec>; 100*4882a593Smuzhiyun simple-audio-card,frame-master = <&sndcodec>; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun sndcpu: simple-audio-card,cpu { 103*4882a593Smuzhiyun sound-dai = <&rcar_sound>; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun sndcodec: simple-audio-card,codec { 107*4882a593Smuzhiyun sound-dai = <&sgtl5000>; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun}; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun&avb { 113*4882a593Smuzhiyun pinctrl-0 = <&avb_pins>; 114*4882a593Smuzhiyun pinctrl-names = "default"; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun phy-handle = <&phy3>; 117*4882a593Smuzhiyun phy-mode = "gmii"; 118*4882a593Smuzhiyun renesas,no-ether-link; 119*4882a593Smuzhiyun status = "okay"; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun phy3: ethernet-phy@3 { 122*4882a593Smuzhiyun /* 123*4882a593Smuzhiyun * On some older versions of the platform (before R4.0) the phy address 124*4882a593Smuzhiyun * may be 1 or 3. The address is fixed to 3 for R4.0 onwards. 125*4882a593Smuzhiyun */ 126*4882a593Smuzhiyun reg = <3>; 127*4882a593Smuzhiyun micrel,led-mode = <1>; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun}; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun&can0 { 132*4882a593Smuzhiyun pinctrl-0 = <&can0_pins>; 133*4882a593Smuzhiyun pinctrl-names = "default"; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun status = "okay"; 136*4882a593Smuzhiyun}; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun&du { 139*4882a593Smuzhiyun pinctrl-0 = <&du0_pins>; 140*4882a593Smuzhiyun pinctrl-names = "default"; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun status = "okay"; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun ports { 145*4882a593Smuzhiyun port@0 { 146*4882a593Smuzhiyun endpoint { 147*4882a593Smuzhiyun remote-endpoint = <&lcd_in>; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun}; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun&hscif1 { 154*4882a593Smuzhiyun pinctrl-0 = <&hscif1_pins>; 155*4882a593Smuzhiyun pinctrl-names = "default"; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun uart-has-rtscts; 158*4882a593Smuzhiyun status = "okay"; 159*4882a593Smuzhiyun}; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun&hsusb { 162*4882a593Smuzhiyun status = "okay"; 163*4882a593Smuzhiyun pinctrl-0 = <&usb0_pins>; 164*4882a593Smuzhiyun pinctrl-names = "default"; 165*4882a593Smuzhiyun}; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun&i2c5 { 168*4882a593Smuzhiyun pinctrl-0 = <&i2c5_pins>; 169*4882a593Smuzhiyun pinctrl-names = "default"; 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun status = "okay"; 172*4882a593Smuzhiyun clock-frequency = <400000>; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun sgtl5000: codec@a { 175*4882a593Smuzhiyun compatible = "fsl,sgtl5000"; 176*4882a593Smuzhiyun #sound-dai-cells = <0>; 177*4882a593Smuzhiyun reg = <0x0a>; 178*4882a593Smuzhiyun clocks = <&audio_clock>; 179*4882a593Smuzhiyun VDDA-supply = <®_3p3v>; 180*4882a593Smuzhiyun VDDIO-supply = <®_3p3v>; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun stmpe811@44 { 184*4882a593Smuzhiyun compatible = "st,stmpe811"; 185*4882a593Smuzhiyun reg = <0x44>; 186*4882a593Smuzhiyun interrupt-parent = <&gpio4>; 187*4882a593Smuzhiyun interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun /* 3.25 MHz ADC clock speed */ 190*4882a593Smuzhiyun st,adc-freq = <1>; 191*4882a593Smuzhiyun /* ADC conversion time: 80 clocks */ 192*4882a593Smuzhiyun st,sample-time = <4>; 193*4882a593Smuzhiyun /* 12-bit ADC */ 194*4882a593Smuzhiyun st,mod-12b = <1>; 195*4882a593Smuzhiyun /* internal ADC reference */ 196*4882a593Smuzhiyun st,ref-sel = <0>; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun stmpe_touchscreen { 199*4882a593Smuzhiyun compatible = "st,stmpe-ts"; 200*4882a593Smuzhiyun /* 8 sample average control */ 201*4882a593Smuzhiyun st,ave-ctrl = <3>; 202*4882a593Smuzhiyun /* 7 length fractional part in z */ 203*4882a593Smuzhiyun st,fraction-z = <7>; 204*4882a593Smuzhiyun /* 205*4882a593Smuzhiyun * 50 mA typical 80 mA max touchscreen drivers 206*4882a593Smuzhiyun * current limit value 207*4882a593Smuzhiyun */ 208*4882a593Smuzhiyun st,i-drive = <1>; 209*4882a593Smuzhiyun /* 1 ms panel driver settling time */ 210*4882a593Smuzhiyun st,settling = <3>; 211*4882a593Smuzhiyun /* 5 ms touch detect interrupt delay */ 212*4882a593Smuzhiyun st,touch-det-delay = <5>; 213*4882a593Smuzhiyun }; 214*4882a593Smuzhiyun }; 215*4882a593Smuzhiyun}; 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun&pci1 { 218*4882a593Smuzhiyun status = "okay"; 219*4882a593Smuzhiyun pinctrl-0 = <&usb1_pins>; 220*4882a593Smuzhiyun pinctrl-names = "default"; 221*4882a593Smuzhiyun}; 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun&pfc { 224*4882a593Smuzhiyun avb_pins: avb { 225*4882a593Smuzhiyun groups = "avb_mdio", "avb_gmii"; 226*4882a593Smuzhiyun function = "avb"; 227*4882a593Smuzhiyun }; 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun backlight_pins: backlight { 230*4882a593Smuzhiyun groups = "tpu_to3_c"; 231*4882a593Smuzhiyun function = "tpu"; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun can0_pins: can0 { 235*4882a593Smuzhiyun groups = "can0_data"; 236*4882a593Smuzhiyun function = "can0"; 237*4882a593Smuzhiyun }; 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun du0_pins: du0 { 240*4882a593Smuzhiyun groups = "du0_rgb666", "du0_sync", "du0_disp", "du0_clk0_out"; 241*4882a593Smuzhiyun function = "du0"; 242*4882a593Smuzhiyun }; 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun hscif1_pins: hscif1 { 245*4882a593Smuzhiyun groups = "hscif1_data", "hscif1_ctrl"; 246*4882a593Smuzhiyun function = "hscif1"; 247*4882a593Smuzhiyun }; 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun i2c5_pins: i2c5 { 250*4882a593Smuzhiyun groups = "i2c5_b"; 251*4882a593Smuzhiyun function = "i2c5"; 252*4882a593Smuzhiyun }; 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun scif4_pins: scif4 { 255*4882a593Smuzhiyun groups = "scif4_data_b"; 256*4882a593Smuzhiyun function = "scif4"; 257*4882a593Smuzhiyun }; 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun sdhi0_pins: sd0 { 260*4882a593Smuzhiyun groups = "sdhi0_data4", "sdhi0_ctrl"; 261*4882a593Smuzhiyun function = "sdhi0"; 262*4882a593Smuzhiyun power-source = <3300>; 263*4882a593Smuzhiyun }; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun sound_pins: sound { 266*4882a593Smuzhiyun groups = "ssi34_ctrl", "ssi3_data", "ssi4_data"; 267*4882a593Smuzhiyun function = "ssi"; 268*4882a593Smuzhiyun }; 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun usb0_pins: usb0 { 271*4882a593Smuzhiyun groups = "usb0"; 272*4882a593Smuzhiyun function = "usb0"; 273*4882a593Smuzhiyun }; 274*4882a593Smuzhiyun 275*4882a593Smuzhiyun usb1_pins: usb1 { 276*4882a593Smuzhiyun groups = "usb1"; 277*4882a593Smuzhiyun function = "usb1"; 278*4882a593Smuzhiyun }; 279*4882a593Smuzhiyun}; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun&rcar_sound { 282*4882a593Smuzhiyun pinctrl-0 = <&sound_pins>; 283*4882a593Smuzhiyun pinctrl-names = "default"; 284*4882a593Smuzhiyun status = "okay"; 285*4882a593Smuzhiyun 286*4882a593Smuzhiyun /* Single DAI */ 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun #sound-dai-cells = <0>; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun rcar_sound,dai { 291*4882a593Smuzhiyun dai0 { 292*4882a593Smuzhiyun playback = <&ssi3 &src3 &dvc0>; 293*4882a593Smuzhiyun capture = <&ssi4 &src4 &dvc1>; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun}; 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun&scif4 { 299*4882a593Smuzhiyun pinctrl-0 = <&scif4_pins>; 300*4882a593Smuzhiyun pinctrl-names = "default"; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun status = "okay"; 303*4882a593Smuzhiyun}; 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun&sdhi0 { 306*4882a593Smuzhiyun pinctrl-0 = <&sdhi0_pins>; 307*4882a593Smuzhiyun pinctrl-names = "default"; 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun vmmc-supply = <®_3p3v>; 310*4882a593Smuzhiyun vqmmc-supply = <&vccq_sdhi0>; 311*4882a593Smuzhiyun cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; 312*4882a593Smuzhiyun status = "okay"; 313*4882a593Smuzhiyun}; 314*4882a593Smuzhiyun 315*4882a593Smuzhiyun&ssi4 { 316*4882a593Smuzhiyun shared-pin; 317*4882a593Smuzhiyun}; 318*4882a593Smuzhiyun 319*4882a593Smuzhiyun&tpu { 320*4882a593Smuzhiyun pinctrl-0 = <&backlight_pins>; 321*4882a593Smuzhiyun pinctrl-names = "default"; 322*4882a593Smuzhiyun status = "okay"; 323*4882a593Smuzhiyun}; 324*4882a593Smuzhiyun 325*4882a593Smuzhiyun&usbphy { 326*4882a593Smuzhiyun status = "okay"; 327*4882a593Smuzhiyun}; 328