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/optee_os/core/arch/riscv/kernel/
H A Dthread_rv.S58 /* Save sp, a0, a1 into temporary spaces of thread_core_local */
70 /* Load and save kernel sp */
77 /* Save all other GPRs */
85 /* Save XIE */
90 /* Save XSTATUS */
93 /* Save XEPC */
200 * Save state on stack
204 /* Save kernel sp */
211 /* Save all other GPRs */
220 /* Save XIE */
[all …]
H A Dthread_optee_abi_rv.S46 /* Save return value */
88 /* Save return address xSTATUS and pointer to rv */
98 /* Save thread state */
101 /* Save ra, sp, gp, tp, and s0~s11 */
H A Darch_scall_rv.S22 /* Save scall regs to t0 */
25 /* Save func to t1 */
H A Dentry.S67 /* Save hart_id and hart_index into thread_core_local */
126 mv s0, a0 /* Save hart ID into s0 */
131 mv s1, a1 /* Save device tree address into s1 */
329 * 1. Save current sp to s2, and set sp as threads[0].stack_va_end
/optee_os/lib/libutils/isoc/arch/arm/
H A Darm32_aeabi_ldivmod_a32.S15 UNWIND( .save {ip, lr})
17 UNWIND( .save {r0-r3})
30 UNWIND( .save {ip, lr})
32 UNWIND( .save {r0-r3})
H A Dsetjmp_a32.S99 /* Save registers in jump buffer. */
204 /* Save all the callee-preserved registers into the jump buffer. */
216 /* Save the floating point registers. */
225 * offset used to save ftrace return index.
/optee_os/ldelf/
H A Dsyscalls_a32.S22 UNWIND( .save {r5-r7, lr})
42 UNWIND( .save {r0-r11, lr})
45 UNWIND( .save {lr})
/optee_os/lib/libutee/arch/arm/
H A Dutee_syscalls_a32.S19 UNWIND( .save {r5-r7,lr})
51 UNWIND( .save {r0-r11, lr})
54 UNWIND( .save {lr})
/optee_os/core/arch/arm/kernel/
H A Dmisc_a32.S76 UNWIND( .save {r4, lr})
77 mrs r4, cpsr /* save cpsr */
88 UNWIND( .save {r4, lr})
89 mrs r4, cpsr /* save cpsr */
H A Dthread_a64.S150 * Save kern sp in x19
157 * Save the kernel stack pointer in the thread context
162 * Save kernel stack pointer to ensure that el0_svc() uses
183 * Save the values for x0 and x1 in struct thread_core_local to be
207 /* Save x19..x30 */
230 /* Temporarily save x0, x1 */
809 mov x2, sp /* Save SP_EL0 */
817 /* Save APIAKEY */
863 * Save kernel sp we'll had at the beginning of this function.
909 mov x3, sp /* Save original sp */
[all …]
H A Dthread_optee_smc_a32.S177 mov r4, r0 /* Save return value for later */
199 UNWIND( .save {r0, lr})
202 mov r4, r0 /* Save original CPSR */
205 * Switch to temporary stack and SVC mode. Save CPSR to resume into.
H A Dthread_a32.S143 mrs r6, cpsr /* Save current CPSR */
190 mov r5, r12 /* Save CPSR in a preserved register */
191 mrs r6, cpsr /* Save current CPSR */
228 UNWIND( .save {r4-r7})
241 UNWIND( .save {r4-r7})
314 * Save all registers to allow syscall_return() to resume execution
324 * Save old user sp and set new user sp.
460 * because the secure monitor doesn't save those. The treatment of
461 * the banked fiq registers is somewhat analogous to the lazy save
538 * Currently we can save the state properly if the FIQ is received
H A Dthread_spmc_a64.S85 ror w19, w0, #16 /* Save target info with src and dst swapped */
87 mov w20, w0 /* Save return value */
149 /* Save APIAKEY */
H A Dthread_optee_smc_a64.S161 mov w20, w0 /* Save return value for later */
192 /* Save APIAKEY */
/optee_os/core/drivers/crypto/caam/ae/
H A Dcaam_ae_gcm.c91 * 2) Save the current ghash value in caam_ae_do_block_gcm()
94 * 5) Save current AAD len in caam_ae_do_block_gcm()
103 * 2) Save the current ghash value in caam_ae_do_block_gcm()
106 * 5) Save current AAD len in caam_ae_do_block_gcm()
159 * Save the current ghash value in caam_ae_do_block_gcm()
235 * Save current AAD len in caam_ae_do_block_gcm()
/optee_os/core/drivers/crypto/stm32/
H A Dstm32_cryp.c455 /* Save CR */ in save_context()
460 /* If algo mode needs to save current IV */ in save_context()
464 /* Save IV */ in save_context()
534 /* Save full IV that will be b0 */ in ccm_first_context()
549 /* Save CTR0 */ in ccm_first_context()
676 /* Save algo mode */ in stm32_cryp_init()
721 * And save block size in stm32_cryp_init()
748 /* Save key in HW order */ in stm32_cryp_init()
753 /* Save IV */ in stm32_cryp_init()
759 * We save IV in the byte order expected by the in stm32_cryp_init()
[all …]
H A Dstm32_saes.c401 /* Save CR */ in save_context()
409 /* If chaining mode need to save current IV */ in save_context()
413 /* Save IV */ in save_context()
576 /* Save chaining mode */ in stm32_saes_init()
626 /* Save key */ in stm32_saes_init()
635 * /!\ we save the key in HW byte order in stm32_saes_init()
646 * /!\ we save the key in HW byte order in stm32_saes_init()
676 /* Save IV */ in stm32_saes_init()
778 * Save remaining data to manage them later (potentially with new in stm32_saes_update_assodata()
803 * @param data_out: pointer where to save de/encrypted payload
[all …]
/optee_os/core/arch/arm/include/kernel/
H A Dvfp.h88 * @state: VFP state to save to
92 * @force_save is true: save rest of state and disable VFP. Otherwise, do
/optee_os/core/drivers/pm/sam/
H A Dpm_suspend.S323 /* Save registers on stack */
477 /* Save RC oscillator state */
550 /* Save RC oscillator state and check if it is enabled. */
668 * Save PLLA setting and disable it
674 /* Save PLLA settings */
679 /* save div */
685 /* save mul */
720 /* Save PLLA setting and disable it */
804 * at91_mckx_ps_enable: save MCK1..4 settings and switch it to main clock
894 /* Save Master clock setting */
/optee_os/lib/libutils/ext/arch/riscv/
H A Dmcount_rv.S63 /* Save ra and s0(fp) onto stack */
92 /* Save return value regs */
/optee_os/core/arch/arm/sm/
H A Dpsci-helper.S29 UNWIND( .save {r12, lr})
/optee_os/lib/libutils/isoc/newlib/
H A Dmemcpy.c92 _PTR save = dst0; variable
97 return save;
/optee_os/core/drivers/crypto/caam/
H A Dcaam_pwr.c34 /* Count the number of registers to save/restore */ in caam_pwr_add_backup()
79 PWR_TRACE("Save @0x%" PRIxPTR "=0x%" PRIx32, in do_save_regs()
/optee_os/lib/libutee/arch/riscv/
H A Dutee_syscalls_rv.S28 /* Save return address and frame pointer to stack */
/optee_os/core/arch/arm/plat-stm32mp2/
H A Dstm32mp_pm.h23 * - PM_HINT_CONTEXT_STATE : advertise driver to save all their context in DDR

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