Searched +full:em +full:- +full:gio (Results 1 – 7 of 7) sorted by relevance
1 // SPDX-License-Identifier: GPL-2.08 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/interrupt-controller/irq.h>13 interrupt-parent = <&gic>;14 #address-cells = <1>;15 #size-cells = <1>;28 #address-cells = <1>;29 #size-cells = <0>;33 compatible = "arm,cortex-a9";35 clock-frequency = <533000000>;[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/gpio/renesas,em-gio.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Magnus Damm <magnus.damm@gmail.com>14 const: renesas,em-gio18 - description: First set of contiguous registers19 - description: Second set of contiguous registers23 - description: Interrupt for the first set of 16 GPIO ports24 - description: Interrupt for the second set of 16 GPIO ports[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * Emma Mobile GPIO Support - GIO61 return ioread32(p->base0 + offs); in em_gio_read()63 return ioread32(p->base1 + (offs - GIO_IDT0)); in em_gio_read()70 iowrite32(value, p->base0 + offs); in em_gio_write()72 iowrite32(value, p->base1 + (offs - GIO_IDT0)); in em_gio_write()94 ret = gpiochip_lock_as_irq(&p->gpio_chip, irqd_to_hwirq(d)); in em_gio_irq_reqres()96 dev_err(p->gpio_chip.parent, in em_gio_irq_reqres()108 gpiochip_unlock_as_irq(&p->gpio_chip, irqd_to_hwirq(d)); in em_gio_irq_relres()131 return -EINVAL; in em_gio_irq_set_type()[all …]
1 drwxr-xr-x root root 4096 ./bin2 lrwxrwxrwx root root 19 ./bin/ash -> /bin/busybox.nosuid3 lrwxrwxrwx root root 25 ./bin/base64 -> /usr/bin/base64.coreutils4 -rwxr-xr-x root root 1190872 ./bin/bash.bash5 lrwxrwxrwx root root 14 ./bin/bash -> /bin/bash.bash6 lrwxrwxrwx root root 14 ./bin/busybox -> busybox.nosuid7 -rwxr-xr-x root root 613008 ./bin/busybox.nosuid8 -rwsr-xr-x root root 59440 ./bin/busybox.suid9 lrwxrwxrwx root root 18 ./bin/cat -> /bin/cat.coreutils10 -rwxr-xr-x root root 47336 ./bin/cat.coreutils[all …]
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