Searched +full:ast2500 +full:- +full:sd +full:- +full:controller (Results 1 – 7 of 7) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.0-or-later4 ---6 $schema: http://devicetree.org/meta-schemas/core.yaml#8 title: ASPEED SD/SDIO/MMC Controller11 - Andrew Jeffery <andrew@aj.id.au>12 - Ryan Chen <ryanchen.aspeed@gmail.com>15 The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO26 - aspeed,ast2400-sd-controller27 - aspeed,ast2500-sd-controller28 - aspeed,ast2600-sd-controller[all …]
1 // SPDX-License-Identifier: GPL-2.0+2 #include <dt-bindings/clock/aspeed-clock.h>3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>7 compatible = "aspeed,ast2500";8 #address-cells = <1>;9 #size-cells = <1>;10 interrupt-parent = <&vic>;36 #address-cells = <1>;37 #size-cells = <0>;40 compatible = "arm,arm1176jzf-s";[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later4 #include <dt-bindings/interrupt-controller/arm-gic.h>5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>6 #include <dt-bindings/clock/ast2600-clock.h>11 #address-cells = <1>;12 #size-cells = <1>;13 interrupt-parent = <&gic>;43 #address-cells = <1>;44 #size-cells = <0>;45 enable-method = "aspeed,ast2600-smp";[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later17 #include "sdhci-pltfm.h"43 spin_lock(&sdc->lock); in aspeed_sdc_configure_8bit_mode()44 info = readl(sdc->regs + ASPEED_SDC_INFO); in aspeed_sdc_configure_8bit_mode()46 info |= sdhci->width_mask; in aspeed_sdc_configure_8bit_mode()48 info &= ~sdhci->width_mask; in aspeed_sdc_configure_8bit_mode()49 writel(info, sdc->regs + ASPEED_SDC_INFO); in aspeed_sdc_configure_8bit_mode()50 spin_unlock(&sdc->lock); in aspeed_sdc_configure_8bit_mode()61 parent = clk_get_rate(pltfm_host->clk); in aspeed_sdhci_set_clock()68 if (WARN_ON(clock > host->max_clk)) in aspeed_sdhci_set_clock()[all …]
1 // SPDX-License-Identifier: GPL-2.0+4 #define pr_fmt(fmt) "clk-aspeed: " fmt13 #include <dt-bindings/clock/aspeed-clock.h>15 #include "clk-aspeed.h"49 [ASPEED_CLK_GATE_ECLK] = { 0, 6, "eclk-gate", "eclk", 0 }, /* Video Engine */50 [ASPEED_CLK_GATE_GCLK] = { 1, 7, "gclk-gate", NULL, 0 }, /* 2D engine */51 [ASPEED_CLK_GATE_MCLK] = { 2, -1, "mclk-gate", "mpll", CLK_IS_CRITICAL }, /* SDRAM */52 [ASPEED_CLK_GATE_VCLK] = { 3, -1, "vclk-gate", NULL, 0 }, /* Video Capture */53 [ASPEED_CLK_GATE_BCLK] = { 4, 8, "bclk-gate", "bclk", CLK_IS_CRITICAL }, /* PCIe/PCI */54 [ASPEED_CLK_GATE_DCLK] = { 5, -1, "dclk-gate", NULL, CLK_IS_CRITICAL }, /* DAC */[all …]
9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------97 W: *Web-page* with status/info[all …]
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