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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/thermal/
H A Dallwinner,sun8i-a83t-ths.yaml4 $id: http://devicetree.org/schemas/thermal/allwinner,sun8i-a83t-ths.yaml#
16 - allwinner,sun8i-a83t-ths
17 - allwinner,sun8i-h3-ths
18 - allwinner,sun8i-r40-ths
19 - allwinner,sun50i-a64-ths
20 - allwinner,sun50i-a100-ths
21 - allwinner,sun50i-h5-ths
22 - allwinner,sun50i-h6-ths
66 - allwinner,sun50i-a100-ths
67 - allwinner,sun50i-h6-ths
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/iio/adc/
H A Dallwinner,sun8i-a33-ths.yaml4 $id: http://devicetree.org/schemas/iio/adc/allwinner,sun8i-a33-ths.yaml#
21 const: allwinner,sun8i-a33-ths
36 ths: ths@1c25000 {
37 compatible = "allwinner,sun8i-a33-ths";
/OK3568_Linux_fs/kernel/drivers/thermal/
H A Dsun8i_thermal.c119 /* ths have no data yet */ in sun8i_ths_get_temp()
262 * register is 12-bit. In this case, ths hardware can in sun50i_h6_ths_calibrate()
294 * not accessible, the THS hardware can still work, although in sun8i_ths_calibrate()
525 IRQF_ONESHOT, "ths", tmdev); in sun8i_ths_probe()
631 { .compatible = "allwinner,sun8i-a83t-ths", .data = &sun8i_a83t_ths },
632 { .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths },
633 { .compatible = "allwinner,sun8i-r40-ths", .data = &sun8i_r40_ths },
634 { .compatible = "allwinner,sun50i-a64-ths", .data = &sun50i_a64_ths },
635 { .compatible = "allwinner,sun50i-a100-ths", .data = &sun50i_a100_ths },
636 { .compatible = "allwinner,sun50i-h5-ths", .data = &sun50i_h5_ths },
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-s3c/
H A Diotiming-s3c2410.c77 * @cyc: The cycle time, in 10ths of nanoseconds.
78 * @hclk_tns: The cycle time for HCLK, in 10ths of nanoseconds.
93 * @cyc: The cycle time, in 10ths of nanoseconds.
94 * @hclk_tns: The cycle time for HCLK, in 10ths of nanoseconds.
140 * @cyc: The cycle time, in 10ths of nanoseconds.
142 * @hclk_tns: The cycle time for HCLK, in 10ths of nanoseconds.
261 * @hclk_tns: The cycle time for HCLK, in 10ths of nanoseconds.
273 * @hclk_tns: The cycle time for HCLK, in 10ths of nanoseconds.
H A Diotiming-s3c2412.c61 * @cyc_tns: The cycle time in 10ths of nanoseconds.
62 * @clk_tns: The clock period in 10ths of nanoseconds.
71 * @hwtm: The hardware timing in 10ths of nanoseconds.
72 * @clk_tns: The clock period in 10ths of nanoseconds.
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h5.dtsi163 ths: thermal-sensor@1c25000 { label
164 compatible = "allwinner,sun50i-h5-ths";
180 thermal-sensors = <&ths 0>;
210 thermal-sensors = <&ths 1>;
H A Dsun50i-a100.dtsi252 ths: thermal-sensor@5070400 { label
253 compatible = "allwinner,sun50i-a100-ths";
349 thermal-sensors = <&ths 0>;
355 thermal-sensors = <&ths 2>;
361 thermal-sensors = <&ths 1>;
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dsun8i-a33.dtsi164 io-channels = <&ths>;
250 ths: ths@1c25000 { label
251 compatible = "allwinner,sun8i-a33-ths";
295 thermal-sensors = <&ths>;
H A Dsun8i-h3.dtsi231 ths: thermal-sensor@1c25000 { label
232 compatible = "allwinner,sun8i-h3-ths";
248 thermal-sensors = <&ths 0>;
H A Dimx6q-cubox-i.dts57 fsl,transmit-atten-16ths = <9>;
H A Dimx6q-cubox-i-som-v15.dts57 fsl,transmit-atten-16ths = <9>;
H A Dimx6q-hummingboard2.dts59 fsl,transmit-atten-16ths = <9>;
H A Dimx6q-hummingboard-emmc-som-v15.dts59 fsl,transmit-atten-16ths = <9>;
H A Dimx6q-hummingboard.dts58 fsl,transmit-atten-16ths = <9>;
H A Dimx6q-cubox-i-emmc-som-v15.dts58 fsl,transmit-atten-16ths = <9>;
H A Dimx6q-hummingboard2-emmc-som-v15.dts61 fsl,transmit-atten-16ths = <9>;
H A Dimx6q-hummingboard-som-v15.dts58 fsl,transmit-atten-16ths = <9>;
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/iio/light/
H A Dus5182d.txt11 - upisemi,dark-ths: array of 8 elements containing 16-bit thresholds (adc
42 upisemi,dark-ths = /bits/ 16 <170 200 512 512 800 2000 4000 8000>;
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/ata/
H A Dimx-sata.yaml49 fsl,transmit-atten-16ths:
51 description: transmit attenuation, in 16ths.
/OK3568_Linux_fs/kernel/drivers/gpu/drm/hisilicon/kirin/kirin/
H A Ddw_drm_dsi.c297 * Clock lane timing control setting: TLPX, THS-PREPARE, in dsi_set_mipi_phy()
298 * THS-ZERO, THS-TRAIL, TWAKEUP. in dsi_set_mipi_phy()
307 * Data lane timing control setting: TLPX, THS-PREPARE, in dsi_set_mipi_phy()
308 * THS-ZERO, THS-TRAIL, TTA-GO, TTA-GET, TWAKEUP. in dsi_set_mipi_phy()
/OK3568_Linux_fs/kernel/include/linux/soc/samsung/
H A Ds3c-cpu-freq.h22 * @hclk_tns: HCLK cycle time in 10ths of nano-seconds.
36 unsigned long hclk_tns; /* in 10ths of ns */
/OK3568_Linux_fs/u-boot/drivers/video/drm/
H A Drk618_dsi.c450 * The value of counter for HS Ths-prepare in rk618_dsi_phy_power_on()
451 * For clock lane, Ths-prepare(38ns~95ns) in rk618_dsi_phy_power_on()
452 * For data lane, Ths-prepare(40ns+4UI~85ns+6UI) in rk618_dsi_phy_power_on()
453 * Ths-prepare = Ttxddrclkhs * value in rk618_dsi_phy_power_on()
473 * The value of counter for HS Ths-exit in rk618_dsi_phy_power_on()
474 * Ths-exit = Tpin_txbyteclkhs * value in rk618_dsi_phy_power_on()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/rk618/
H A Drk618_dsi.c443 * The value of counter for HS Ths-prepare in rk618_dsi_phy_power_on()
444 * For clock lane, Ths-prepare(38ns~95ns) in rk618_dsi_phy_power_on()
445 * For data lane, Ths-prepare(40ns+4UI~85ns+6UI) in rk618_dsi_phy_power_on()
446 * Ths-prepare = Ttxddrclkhs * value in rk618_dsi_phy_power_on()
469 * The value of counter for HS Ths-exit in rk618_dsi_phy_power_on()
470 * Ths-exit = Tpin_txbyteclkhs * value in rk618_dsi_phy_power_on()
/OK3568_Linux_fs/kernel/arch/arm/mach-davinci/include/mach/
H A Dhardware.h15 * Before you add anything to ths file:
/OK3568_Linux_fs/kernel/fs/xfs/
H A Dxfs_globals.c11 * 100ths of a second) with the exception of eofb_timer and cowb_timer, which

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