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/OK3568_Linux_fs/kernel/drivers/media/pci/cx25821/
H A Dcx25821-core.c299 static int cx25821_risc_decode(u32 risc) in cx25821_risc_decode() argument
331 risc, instr[risc >> 28] ? instr[risc >> 28] : "INVALID"); in cx25821_risc_decode()
333 if (risc & (1 << (i + 12))) in cx25821_risc_decode()
336 pr_cont(" count=%d ]\n", risc & 0xfff); in cx25821_risc_decode()
337 return incr[risc >> 28] ? incr[risc >> 28] : 1; in cx25821_risc_decode()
426 unsigned int bpl, u32 risc) in cx25821_sram_channel_setup() argument
468 cx_write(ch->cmds_start + 0, risc); in cx25821_sram_channel_setup()
494 unsigned int bpl, u32 risc) in cx25821_sram_channel_setup_audio() argument
532 cx_write(ch->cmds_start + 0, risc); in cx25821_sram_channel_setup_audio()
562 "init risc lo", in cx25821_sram_channel_dump()
[all …]
/OK3568_Linux_fs/kernel/drivers/media/pci/bt8xx/
H A Dbtcx-risc.c4 btcx-risc.c
6 bt848/bt878/cx2388x risc code generator.
23 #include "btcx-risc.h"
37 /* allocate/free risc memory */
42 struct btcx_riscmem *risc) in btcx_riscmem_free() argument
44 if (NULL == risc->cpu) in btcx_riscmem_free()
49 memcnt, (unsigned long)risc->dma); in btcx_riscmem_free()
51 pci_free_consistent(pci, risc->size, risc->cpu, risc->dma); in btcx_riscmem_free()
52 memset(risc,0,sizeof(*risc)); in btcx_riscmem_free()
56 struct btcx_riscmem *risc, in btcx_riscmem_alloc() argument
[all …]
H A Dbttv-risc.c4 bttv-risc.c -- interfaces to other kernel modules
6 bttv risc code handling
32 /* risc code generators */
35 bttv_risc_packed(struct bttv *btv, struct btcx_riscmem *risc, in bttv_risc_packed() argument
46 /* estimate risc mem: worst case is one write per page border + in bttv_risc_packed()
54 if ((rc = btcx_riscmem_alloc(btv->c.pci,risc,instructions)) < 0) in bttv_risc_packed()
58 rp = risc->cpu; in bttv_risc_packed()
108 risc->jmp = rp; in bttv_risc_packed()
109 BUG_ON((risc->jmp - risc->cpu + 2) * sizeof(*risc->cpu) > risc->size); in bttv_risc_packed()
114 bttv_risc_planar(struct bttv *btv, struct btcx_riscmem *risc, in bttv_risc_planar() argument
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/OK3568_Linux_fs/kernel/drivers/media/pci/cx88/
H A Dcx88-core.c130 int cx88_risc_buffer(struct pci_dev *pci, struct cx88_riscmem *risc, in cx88_risc_buffer() argument
145 * estimate risc mem: worst case is one write per page border + in cx88_risc_buffer()
153 risc->size = instructions * 8; in cx88_risc_buffer()
154 risc->dma = 0; in cx88_risc_buffer()
155 risc->cpu = pci_zalloc_consistent(pci, risc->size, &risc->dma); in cx88_risc_buffer()
156 if (!risc->cpu) in cx88_risc_buffer()
159 /* write risc instructions */ in cx88_risc_buffer()
160 rp = risc->cpu; in cx88_risc_buffer()
170 risc->jmp = rp; in cx88_risc_buffer()
171 WARN_ON((risc->jmp - risc->cpu + 2) * sizeof(*risc->cpu) > risc->size); in cx88_risc_buffer()
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H A Dcx88-vbi.c59 VBI_LINE_LENGTH, buf->risc.dma); in cx8800_start_vbi_dma()
147 return cx88_risc_buffer(dev->pci, &buf->risc, sgt->sgl, in buffer_prepare()
158 struct cx88_riscmem *risc = &buf->risc; in buffer_finish() local
160 if (risc->cpu) in buffer_finish()
161 pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma); in buffer_finish()
162 memset(risc, 0, sizeof(*risc)); in buffer_finish()
174 buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 8); in buffer_queue()
175 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC); in buffer_queue()
176 buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 8); in buffer_queue()
184 buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1); in buffer_queue()
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/OK3568_Linux_fs/kernel/drivers/media/pci/cx23885/
H A Dcx23885-core.c38 * encountered is "mpeg risc op code error". Only Ryzen platforms employ
45 MODULE_PARM_DESC(dma_reset_workaround, "periodic RiSC dma engine reset; 0-force disable, 1-driver d…
384 static int cx23885_risc_decode(u32 risc) in cx23885_risc_decode() argument
415 printk(KERN_DEBUG "0x%08x [ %s", risc, in cx23885_risc_decode()
416 instr[risc >> 28] ? instr[risc >> 28] : "INVALID"); in cx23885_risc_decode()
418 if (risc & (1 << (i + 12))) in cx23885_risc_decode()
420 pr_cont(" count=%d ]\n", risc & 0xfff); in cx23885_risc_decode()
421 return incr[risc >> 28] ? incr[risc >> 28] : 1; in cx23885_risc_decode()
456 unsigned int bpl, u32 risc) in cx23885_sram_channel_setup() argument
499 cx_write(ch->cmds_start + 0, risc); in cx23885_sram_channel_setup()
[all …]
H A Dcx23885-vbi.c94 VBI_LINE_LENGTH, buf->risc.dma); in cx23885_start_vbi_dma()
107 cx_set(VID_A_DMA_CTL, 0x22); /* FIFO and RISC enable */ in cx23885_start_vbi_dma()
144 cx23885_risc_vbibuffer(dev->pci, &buf->risc, in buffer_prepare()
162 * The risc program for each buffer works as follows: it starts with a simple
167 * This is the risc program of the first buffer to be queued if the active list
192 buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 12); in buffer_queue()
193 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC); in buffer_queue()
194 buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 12); in buffer_queue()
195 buf->risc.jmp[2] = cpu_to_le32(0); /* bits 63-32 */ in buffer_queue()
205 buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1); in buffer_queue()
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H A Dcx23885-alsa.c160 /* Make sure RISC/FIFO are off before changing FIFO/RISC settings */ in cx23885_start_audio_dma()
165 buf->risc.dma); in cx23885_start_audio_dma()
192 cx_set(DEV_CNTRL2, (1<<5)); /* Enables Risc Processor */ in cx23885_start_audio_dma()
194 RISC enable */ in cx23885_start_audio_dma()
236 /* risc op code error */ in cx23885_audio_irq()
238 pr_warn("%s/1: Audio risc op code error\n", in cx23885_audio_irq()
261 struct cx23885_riscmem *risc; in dsp_buffer_free() local
268 risc = &chip->buf->risc; in dsp_buffer_free()
269 pci_free_consistent(chip->pci, risc->size, risc->cpu, risc->dma); in dsp_buffer_free()
393 ret = cx23885_risc_databuffer(chip->pci, &buf->risc, buf->sglist, in snd_cx23885_hw_params()
[all …]
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/share/doc/as.html/
H A DRISC_002dV_002dDependent.html16 <title>Using as: RISC-V-Dependent</title>
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70 <h3 class="section">9.38 RISC-V Dependent Features</h3>
74 …ISC_002dV_002dOptions" accesskey="1">RISC-V-Options</a>:</td><td>&nbsp;&nbsp;</td><td align="left"…
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82 …_002dV_002dATTRIBUTE" accesskey="5">RISC-V-ATTRIBUTE</a>:</td><td>&nbsp;&nbsp;</td><td align="left…
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70 <h4 class="subsection">9.38.2 RISC-V Directives</h4>
74 <p>The following table lists all available RISC-V specific directives.
117 <dd><p>Modifies RISC-V specific assembler options inline with the assembly code.
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70 <h4 class="subsection">9.38.3 RISC-V Assembler Modifiers</h4>
72 <p>The RISC-V assembler supports following modifiers for relocatable addresses
73 used in RISC-V instruction operands. However, we also support some pseudo
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70 <h4 class="subsection">9.38.1 RISC-V Options</h4>
72 <p>The following table lists all available RISC-V specific options.
173 …y="n" rel="next">RISC-V-Directives</a>, Up: <a href="RISC_002dV_002dDependent.html#RISC_002dV_002d…
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/share/doc/as.html/
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70 <h3 class="section">9.38 RISC-V Dependent Features</h3>
74 …ISC_002dV_002dOptions" accesskey="1">RISC-V-Options</a>:</td><td>&nbsp;&nbsp;</td><td align="left"…
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66 …RISC-V-Modifiers</a>, Previous: <a href="RISC_002dV_002dOptions.html#RISC_002dV_002dOptions" acces…
70 <h4 class="subsection">9.38.2 RISC-V Directives</h4>
74 <p>The following table lists all available RISC-V specific directives.
117 <dd><p>Modifies RISC-V specific assembler options inline with the assembly code.
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66 …RISC-V-Formats</a>, Previous: <a href="RISC_002dV_002dDirectives.html#RISC_002dV_002dDirectives" a…
70 <h4 class="subsection">9.38.3 RISC-V Assembler Modifiers</h4>
72 <p>The RISC-V assembler supports following modifiers for relocatable addresses
73 used in RISC-V instruction operands. However, we also support some pseudo
[all …]
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70 <h4 class="subsection">9.38.1 RISC-V Options</h4>
72 <p>The following table lists all available RISC-V specific options.
173 …y="n" rel="next">RISC-V-Directives</a>, Up: <a href="RISC_002dV_002dDependent.html#RISC_002dV_002d…
/OK3568_Linux_fs/kernel/drivers/media/pci/tw68/
H A Dtw68-risc.c24 * @rp: pointer to current risc program position
120 * @top_offset: offset within the risc program area for the
122 * @bottom_offset: offset within the risc program area for the
146 * estimate risc mem: worst case is one write per page border + in tw68_risc_buffer()
158 /* write risc instructions */ in tw68_risc_buffer()
170 /* assure risc buffer hasn't overflowed */ in tw68_risc_buffer()
179 static void tw68_risc_decode(u32 risc, u32 addr)
196 p = RISC_OP(risc);
197 if (!(risc & 0x80000000) || !instr[p].name) {
198 pr_debug("0x%08x [ INVALID ]\n", risc);
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/OK3568_Linux_fs/kernel/Documentation/riscv/
H A Dpatch-acceptance.rst8 The RISC-V instruction set architecture is developed in the open:
13 challenge for RISC-V Linux maintenance. Linux maintainers disapprove
16 principles to the RISC-V-related code that will be accepted for
23 "Frozen" or "Ratified" by the RISC-V Foundation. (Developers may, of
27 Additionally, the RISC-V specification allows implementors to create
29 to go through any review or ratification process by the RISC-V
32 RISC-V extensions, we'll only to accept patches for extensions that
33 have been officially frozen or ratified by the RISC-V Foundation.
/OK3568_Linux_fs/buildroot/arch/
H A DConfig.in44 ARM is a 32-bit reduced instruction set computer (RISC)
54 ARM is a 32-bit reduced instruction set computer (RISC)
124 MIPS is a RISC microprocessor from MIPS Technologies. Big
133 MIPS is a RISC microprocessor from MIPS Technologies. Little
143 MIPS is a RISC microprocessor from MIPS Technologies. Big
153 MIPS is a RISC microprocessor from MIPS Technologies. Little
185 PowerPC is a RISC architecture created by Apple-IBM-Motorola
195 PowerPC is a RISC architecture created by Apple-IBM-Motorola
205 PowerPC is a RISC architecture created by Apple-IBM-Motorola
214 RISC-V is an open, free Instruction Set Architecture created
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/OK3568_Linux_fs/kernel/Documentation/translations/it_IT/riscv/
H A Dpatch-acceptance.rst12 L'insieme di istruzioni RISC-V sono sviluppate in modo aperto: le
18 supporto RISC-V nel kernel Linux. I manutentori Linux non amano
22 relativo all'architettura RISC-V che verrà accettato per l'inclusione
29 RISC-V li classifica come "Frozen" o "Retified". (Ovviamente, gli
33 In aggiunta, la specifica RISC-V permette agli implementatori di
35 attraverso il processo di revisione della fondazione RISC-V. Per
38 state ufficialmente accettate dalla fondazione RISC-V. (Ovviamente,
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/riscv/
H A Dcpus.yaml7 title: RISC-V bindings for 'cpus' DT nodes
14 This document uses some terminology common to the RISC-V community
18 mandated by the RISC-V ISA: a PC and some registers. This
39 Identifies that the hart uses the RISC-V instruction set
45 hart. These values originate from the RISC-V Privileged
56 Identifies the specific RISC-V instruction set architecture
57 supported by the hart. These are documented in the RISC-V
69 # RISC-V requires 'timebase-frequency' in /cpus, so disallow it here
/OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/
H A Ddib9000.c93 } risc; member
239 if (state->platform.risc.fw_is_running && (reg < 1024)) in dib9000_read16_attr()
323 if (state->platform.risc.fw_is_running && (reg < 1024)) { in dib9000_write16_attr()
428 …state->platform.risc.memcmd = -1; /* if it was called directly reset it - to force a future setup-… in dib9000_risc_mem_setup_cmd()
433 struct dib9000_fe_memory_map *m = &state->platform.risc.fe_mm[cmd & 0x7f]; in dib9000_risc_mem_setup()
435 if (state->platform.risc.memcmd == cmd && /* same command */ in dib9000_risc_mem_setup()
439 state->platform.risc.memcmd = cmd; in dib9000_risc_mem_setup()
444 if (!state->platform.risc.fw_is_running) in dib9000_risc_mem_read()
447 if (mutex_lock_interruptible(&state->platform.risc.mem_lock) < 0) { in dib9000_risc_mem_read()
453 mutex_unlock(&state->platform.risc.mem_lock); in dib9000_risc_mem_read()
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/OK3568_Linux_fs/kernel/drivers/media/pci/mantis/
H A Dmantis_dma.c43 /* MANTIS_BUF_SIZE / MANTIS_DMA_TR_UNITS must not exceed MANTIS_RISC_SIZE (4k RISC cmd buffer) */
44 #define MANTIS_RISC_SIZE PAGE_SIZE /* RISC program must fit here. */
62 "RISC=0x%lx cpu=0x%p size=%lx", in mantis_dma_exit()
101 "RISC program allocation failed"); in mantis_alloc_buffers()
108 "RISC=0x%lx cpu=0x%p size=%lx", in mantis_alloc_buffers()
128 /* Stop RISC Engine */ in mantis_dma_init()
144 dprintk(MANTIS_DEBUG, 1, "Mantis create RISC program"); in mantis_risc_program()
147 dprintk(MANTIS_DEBUG, 1, "risc len lines %u, bytes per line %u, bytes per DMA tr %u", in mantis_risc_program()
152 dprintk(MANTIS_DEBUG, 1, "RISC PROG line=[%d], step=[%d]", line, step); in mantis_risc_program()
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/interrupt-controller/
H A Driscv,cpu-intc.txt1 RISC-V Hart-Level Interrupt Controller (HLIC)
4 RISC-V cores include Control Status Registers (CSRs) which are local to each
5 CPU core (HART in RISC-V terminology) and can be read or written by software.
10 The RISC-V supervisor ISA manual specifies three interrupt sources that are
18 All RISC-V systems that conform to the supervisor ISA specification are
29 RISC-V supervisor ISA manual, with only the following three interrupts being
/OK3568_Linux_fs/kernel/drivers/scsi/
H A Dwd719x.c166 /* stop the RISC */ in wd719x_destroy()
169 dev_warn(&wd->pdev->dev, "RISC sleep command failed\n"); in wd719x_destroy()
170 /* disable RISC */ in wd719x_destroy()
308 const char fwname_risc[] = "wd719x-risc.bin"; in wd719x_chip_init()
319 /* RISC firmware */ in wd719x_chip_init()
337 /* make a fresh copy of WCS and RISC code */ in wd719x_chip_init()
347 /* ensure RISC is not running */ in wd719x_chip_init()
356 /* Transfer the first 2K words of RISC code to kick start the uP */ in wd719x_chip_init()
358 risc_init[1] = wd->fw_phys + ALIGN(fw_wcs->size, 4); /* RISC FW */ in wd719x_chip_init()
380 dev_warn(&wd->pdev->dev, "RISC bootstrap failed: DMA aborted\n"); in wd719x_chip_init()
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