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/OK3568_Linux_fs/kernel/include/linux/
H A Dcpu_pm.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 * When a CPU goes to a low power state that turns off power to the CPU's
17 * power domain, the contents of some blocks (floating point coprocessors,
18 * interrupt controllers, caches, timers) in the same power domain can
29 * CPU. They are used to save per-cpu context for affected blocks.
31 * CPU cluster notifications apply to all CPUs in a single power domain. They
33 * after all the CPUs in the power domain have been notified of the low power
41 /* A single cpu is entering a low power state */
44 /* A single cpu failed to enter a low power state */
47 /* A single cpu is exiting a low power state */
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/panfrost/
H A Dpanfrost_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * (C) COPYRIGHT 2010-2018 ARM Limited. All rights reserved.
54 #define GPU_PWR_KEY 0x50 /* (WO) Power manager key register */
56 #define GPU_PWR_OVERRIDE0 0x54 /* (RW) Power manager override settings */
57 #define GPU_PWR_OVERRIDE1 0x58 /* (RW) Power manager override settings */
86 #define GPU_SHADER_PRESENT_LO 0x100 /* (RO) Shader core present bitmap, low word */
88 #define GPU_TILER_PRESENT_LO 0x110 /* (RO) Tiler core present bitmap, low word */
91 #define GPU_L2_PRESENT_LO 0x120 /* (RO) Level 2 cache present bitmap, low word */
98 #define GPU_STACK_PRESENT_LO 0xE00 /* (RO) Core stack present bitmap, low word */
101 #define SHADER_READY_LO 0x140 /* (RO) Shader core ready bitmap, low word */
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/OK3568_Linux_fs/kernel/kernel/
H A Dcpu_pm.c1 // SPDX-License-Identifier: GPL-2.0-only
62 * cpu_pm_register_notifier - register a driver with cpu_pm
66 * CPU and CPU cluster low power entry and exit.
83 * cpu_pm_unregister_notifier - unregister a driver with cpu_pm
103 * cpu_pm_enter - CPU low power entry notifier
105 * Notifies listeners that a single CPU is entering a low power state that may
106 * cause some blocks in the same power domain as the cpu to reset.
111 * co-processor, interrupt controller and its PM extensions, local CPU
124 * cpu_pm_exit - CPU low power exit notifier
126 * Notifies listeners that a single CPU is exiting a low power state that may
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/OK3568_Linux_fs/kernel/Documentation/admin-guide/pm/
H A Dsleep-states.rst1 .. SPDX-License-Identifier: GPL-2.0
13 Sleep states are global low-power states of the entire system in which user
28 Suspend-to-Idle
29 ---------------
31 This is a generic, pure software, light-weight variant of system suspend (also
34 I/O devices into low-power states (possibly lower-power than available in the
38 The system is woken up from this state by in-band interrupts, so theoretically
43 or :ref:`suspend-to-RAM <s2ram>`, or it can be used in addition to any of the
50 -------
54 operating state is lost (the system core logic retains power), so the system can
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/OK3568_Linux_fs/kernel/arch/arm/mach-omap2/
H A Domap-mpuss-lowpower.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP MPUSS low power code
8 * OMAP4430 MPUSS mainly consists of dual Cortex-A9 with per-CPU
11 * CPU0, CPU1 and MPUSS each have there own power domain and
12 * hence multiple low power combinations of MPUSS are possible.
17 * to the Cortex-A9 processor must be asserted by the external
18 * power controller.
21 * below modes are supported from power gain vs latency point of view.
24 * ----------------------------------------------
30 * ----------------------------------------------
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/OK3568_Linux_fs/kernel/Documentation/driver-api/pm/
H A Ddevices.rst1 .. SPDX-License-Identifier: GPL-2.0
7 Device Power Management Basics
10 :Copyright: |copy| 2010-2011 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
17 Most of the code in Linux is device drivers, so most of the Linux power
18 management (PM) code is also driver-specific. Most drivers will do very
22 This writeup gives an overview of how drivers interact with system-wide
23 power management goals, emphasizing the models and interfaces that are
25 background for the domain-specific work you'd do with any specific driver.
28 Two Models for Device Power Management
31 Drivers will use one or both of these models to put devices into low-power
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mfd/
H A Dmax77620.txt1 MAX77620 Power management IC from Maxim Semiconductor.
4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
19 are defined at dt-bindings/mfd/max77620.h.
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/OK3568_Linux_fs/kernel/drivers/gpu/arm/midgard/
H A Dmali_midg_regmap.h3 * (C) COPYRIGHT 2010-2017 ARM Limited. All rights reserved.
12 * Boston, MA 02110-1301, USA.
32 #define SUSPEND_SIZE 0x008 /* (RO) Fixed-function suspend buffer
51 and the power manager is idle. */
67 #define GPU_FAULTADDRESS_LO 0x040 /* (RO) GPU exception fault address, low word */
70 #define PWR_KEY 0x050 /* (WO) Power manager key register */
71 #define PWR_OVERRIDE0 0x054 /* (RW) Power manager override settings */
72 #define PWR_OVERRIDE1 0x058 /* (RW) Power manager override settings */
74 #define PRFCNT_BASE_LO 0x060 /* (RW) Performance counter memory region base address, low w…
82 #define CYCLE_COUNT_LO 0x090 /* (RO) Cycle counter, low word */
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/OK3568_Linux_fs/kernel/Documentation/power/
H A Dpci.rst2 PCI Power Management
7 An overview of concepts and the Linux kernel's interfaces related to PCI power
11 This document only covers the aspects of power management specific to PCI
13 power management refer to Documentation/driver-api/pm/devices.rst and
14 Documentation/power/runtime_pm.rst.
18 1. Hardware and Platform Support for PCI Power Management
19 2. PCI Subsystem and Device Power Management
20 3. PCI Device Drivers and Power Management
24 1. Hardware and Platform Support for PCI Power Management
27 1.1. Native and Platform-Based Power Management
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/OK3568_Linux_fs/kernel/Documentation/hwmon/
H A Dltc2947.rst1 Kernel drivers ltc2947-i2c and ltc2947-spi
10 Addresses scanned: -
14 https://www.analog.com/media/en/technical-documentation/data-sheets/LTC2947.pdf
21 The LTC2947 is a high precision power and energy monitor that measures current,
22 voltage, power, temperature, charge and energy. The device supports both SPI
37 The following attributes are supported. Limits are read-write, reset_history
38 is write-only and all the other attributes are read-only.
41 in0_input VP-VM voltage (mV).
49 in0_label Channel label (VP-VM)
61 curr1_input IP-IM Sense current (mA)
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H A Dina2xx.rst10 Addresses: I2C 0x40 - 0x4f
20 Addresses: I2C 0x40 - 0x4f
30 Addresses: I2C 0x40 - 0x4f
40 Addresses: I2C 0x40 - 0x4f
50 Addresses: I2C 0x40 - 0x4f
59 -----------
61 The INA219 is a high-side current shunt and power monitor with an I2C
65 The INA220 is a high or low side current shunt and power monitor with an I2C
68 The INA226 is a current shunt and power monitor with an I2C interface.
71 INA230 and INA231 are high or low side current shunt and power monitors
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H A Disl68137.rst10 Addresses scanned: -
21 Addresses scanned: -
31 Addresses scanned: -
41 Addresses scanned: -
51 Addresses scanned: -
61 Addresses scanned: -
71 Addresses scanned: -
81 Addresses scanned: -
91 Addresses scanned: -
101 Addresses scanned: -
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/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/gpu/
H A Dmali_kbase_gpu_regmap.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * (C) COPYRIGHT 2010-2022 ARM Limited. All rights reserved.
18 * http://www.gnu.org/licenses/gpl-2.0.html.
62 #define GPU_FAULTADDRESS_LO 0x040 /* (RO) GPU exception fault address, low word */
72 #define PWR_KEY 0x050 /* (WO) Power manager key register */
73 #define PWR_OVERRIDE0 0x054 /* (RW) Power manager override settings */
74 #define PWR_OVERRIDE1 0x058 /* (RW) Power manager override settings */
75 #define GPU_FEATURES_LO 0x060 /* (RO) GPU features, low word */
78 #define TIMESTAMP_OFFSET_LO 0x088 /* (RW) Global time stamp offset, low word */
80 #define CYCLE_COUNT_LO 0x090 /* (RO) Cycle counter, low word */
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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dpxa300-raumfeld-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 hw-revision = <0>;
14 stdout-path = &ffuart;
22 reg_3v3: regulator-3v3 {
23 compatible = "regulator-fixed";
24 regulator-name = "3v3-fixed-supply";
25 regulator-min-microvolt = <3300000>;
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H A Dpxa300-raumfeld-controller.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "pxa300-raumfeld-common.dtsi"
9 compatible = "raumfeld,raumfeld-controller-pxa303", "marvell,pxa300";
11 reg_vbatt: regulator-vbatt {
12 compatible = "regulator-fixed";
13 regulator-name = "vbatt-fixed-supply";
14 regulator-min-microvolt = <3700000>;
15 regulator-max-microvolt = <3700000>;
16 regulator-always-on;
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/OK3568_Linux_fs/kernel/Documentation/firmware-guide/acpi/
H A Dlpit.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Low Power Idle Table (LPIT)
7 To enumerate platform Low Power Idle states, Intel platforms are using
8 “Low Power Idle Table” (LPIT). More details about this table can be
12 Residencies for each low power state can be read via FFH
18 - CPU PKG C10 (Read via FFH interface)
19 - Platform Controller Hub (PCH) SLP_S0 (Read via memory mapped interface)
32 This is the lowest possible system power state, achieved only when CPU is in
33 PKG C10 and all functional blocks in PCH are in a low power state.
/OK3568_Linux_fs/kernel/include/linux/ssb/
H A Dssb_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 #define SSB_PCIE_DMA_L32 0x00000000U /* PCIE Client Mode sb2pcitranslation2 (2 ZettaBytes), low 32 …
33 #define SSB_MAX_NR_CORES ((SSB_ENUM_LIMIT - SSB_ENUM_BASE) / SSB_CORE_SIZE)
99 #define SSB_TMSLOW 0x0F98 /* SB Target State Low */
105 #define SSB_TMSLOW_PE 0x40000000 /* Power Management Enable */
108 #define SSB_TMSHIGH_SERR 0x00000001 /* S-error */
158 #define SSB_IDHIGH_RCLO 0x0000000F /* Revision Code (low part) */
168 * in two-byte quantities.
202 #define SSB_SPROM1_BINF_ANTBG 0x3000 /* Available B-PHY and G-PHY antennas */
204 #define SSB_SPROM1_BINF_ANTA 0xC000 /* Available A-PHY antennas */
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/OK3568_Linux_fs/kernel/include/uapi/gpu/arm/bifrost/gpu/
H A Dmali_kbase_gpu_regmap.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * (C) COPYRIGHT 2019-2022 ARM Limited. All rights reserved.
18 * http://www.gnu.org/licenses/gpl-2.0.html.
42 #define SHADER_READY_LO 0x140 /* (RO) Shader core ready bitmap, low word */
45 #define TILER_READY_LO 0x150 /* (RO) Tiler core ready bitmap, low word */
48 #define L2_READY_LO 0x160 /* (RO) Level 2 cache ready bitmap, low word */
51 #define SHADER_PWRON_LO 0x180 /* (WO) Shader core power on bitmap, low word */
52 #define SHADER_PWRON_HI 0x184 /* (WO) Shader core power on bitmap, high word */
54 #define TILER_PWRON_LO 0x190 /* (WO) Tiler core power on bitmap, low word */
55 #define TILER_PWRON_HI 0x194 /* (WO) Tiler core power on bitmap, high word */
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/OK3568_Linux_fs/kernel/Documentation/arm/pxa/
H A Dmfp.rst7 MFP stands for Multi-Function Pin, which is the pin-mux logic on PXA3xx and
15 mechanism is introduced from PXA3xx to completely move the pin-mux functions
16 out of the GPIO controller. In addition to pin-mux configurations, the MFP
17 also controls the low power state, driving strength, pull-up/down and event
21 +--------+
22 | |--(GPIO19)--+
24 | |--(GPIO...) |
25 +--------+ |
26 | +---------+
27 +--------+ +------>| |
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/
H A Dpincfg-node.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 bias-disable:
25 bias-high-impedance:
27 description: high impedance mode ("third-state", "floating")
29 bias-bus-hold:
33 bias-pull-up:
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/OK3568_Linux_fs/kernel/drivers/clk/ti/
H A Ddpll44xx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP4-specific DPLL control functions
20 * can supported when using the DPLL low-power mode. Frequencies are
22 * Status, and Low-Power Operation Mode".
45 mask = clk->flags & CLOCK_CLKOUTX2 ? in omap4_dpllmx_allow_gatectrl()
49 v = ti_clk_ll_ops->clk_readl(&clk->clksel_reg); in omap4_dpllmx_allow_gatectrl()
52 ti_clk_ll_ops->clk_writel(v, &clk->clksel_reg); in omap4_dpllmx_allow_gatectrl()
63 mask = clk->flags & CLOCK_CLKOUTX2 ? in omap4_dpllmx_deny_gatectrl()
67 v = ti_clk_ll_ops->clk_readl(&clk->clksel_reg); in omap4_dpllmx_deny_gatectrl()
70 ti_clk_ll_ops->clk_writel(v, &clk->clksel_reg); in omap4_dpllmx_deny_gatectrl()
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/ti/
H A Ddpll.txt3 Binding status: Unstable - ABI compatibility may be broken in the future
6 register-mapped DPLL with usually two selectable input clocks
10 modes (locked, low power stop etc.) This binding has several
11 sub-types, which effectively result in slightly different setup
14 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
17 - compatible : shall be one of:
18 "ti,omap3-dpll-clock",
19 "ti,omap3-dpll-core-clock",
20 "ti,omap3-dpll-per-clock",
21 "ti,omap3-dpll-per-j-type-clock",
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/tegra/
H A Dnvidia,tegra186-pmc.txt1 NVIDIA Tegra Power Management Controller (PMC)
4 - compatible: Should contain one of the following:
5 - "nvidia,tegra186-pmc": for Tegra186
6 - "nvidia,tegra194-pmc": for Tegra194
7 - "nvidia,tegra234-pmc": for Tegra234
8 - reg: Must contain an (offset, length) pair of the register set for each
9 entry in reg-names.
10 - reg-names: Must include the following entries:
11 - "pmc"
12 - "wake"
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/usb/
H A Dpxa-usb.txt6 - compatible: Should be "marvell,pxa-ohci" for USB controllers
10 - "marvell,enable-port1", "marvell,enable-port2", "marvell,enable-port3"
12 - "marvell,port-mode" selects the mode of the ports:
16 - "marvell,power-sense-low" - power sense pin is low-active.
17 - "marvell,power-control-low" - power control pin is low-active.
18 - "marvell,no-oc-protection" - disable over-current protection.
19 - "marvell,oc-mode-perport" - enable per-port over-current protection.
20 - "marvell,power_on_delay" Power On to Power Good time - in ms.
25 compatible = "marvell,pxa-ohci", "usb-ohci";
28 marvell,enable-port1;
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/dram/
H A Drk3399_dram_timing.txt4 - compatible : Should be "rockchip,ddr-timing"
6 - ddr3_speed_bin : Value is defined at include/dt-bindings/clock/ddr.h.
7 It select DDR3 cl-trp-trcd type, default value "DDR3_DEFAULT".it must selected
11 - pd_idle : Defines the power-down mode auto entry controller clocks.
14 power-down low power state.
16 - sr_idle : Defines the Self-Refresh or Self-Refresh with Memory Clock Gating
19 before the controller will automatically issue an entry into the Self-Refresh
20 or Self-Refresh with Memory Clock Gating low power state.
22 - sr_mc_gate_idle : Defined the Self-Refresh with Memory and Controller Clock Gating
25 the controller will automatically issue an entry into the Self-Refresh with
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