Searched +full:0 +full:x702d0000 (Results 1 – 4 of 4) sorted by relevance
22 pattern: "^ahub@[0-9a-f]*$"79 reg = <0x702d0800 0x800>;86 ranges = <0x702d0000 0x702d0000 0x0000e400>;91 reg = <0x702d0000 0x800>;116 reg = <0x702d1000 0x100>;127 reg = <0x702d4000 0x100>;
22 pattern: "^admaif@[0-9a-f]*$"71 pattern: "^[rt]x(1[0-9]|[1-9]|20)$"90 reg = <0x702d0000 0x800>;
21 reg = <0x0 0x01003000 0x0 0x00000800>, /* PADS registers */22 <0x0 0x01003800 0x0 0x00000800>, /* AFI registers */23 <0x0 0x02000000 0x0 0x10000000>; /* configuration space */30 interrupt-map-mask = <0 0 0 0>;31 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;33 bus-range = <0x00 0xff>;37 ranges = <0x02000000 0 0x01000000 0x0 0x01000000 0 0x00001000>, /* port 0 configuration space */38 <0x02000000 0 0x01001000 0x0 0x01001000 0 0x00001000>, /* port 1 configuration space */39 <0x01000000 0 0x0 0x0 0x12000000 0 0x00010000>, /* downstream I/O (64 KiB) */40 <0x02000000 0 0x13000000 0x0 0x13000000 0 0x0d000000>, /* non-prefetchable memory (208 MiB) */[all …]
33 #define CLK_SOURCE_CSITE 0x1d434 #define CLK_SOURCE_EMC 0x19c35 #define CLK_SOURCE_SOR1 0x41036 #define CLK_SOURCE_SOR0 0x41437 #define CLK_SOURCE_LA 0x1f838 #define CLK_SOURCE_SDMMC2 0x15439 #define CLK_SOURCE_SDMMC4 0x16440 #define CLK_SOURCE_EMC_DLL 0x66442 #define PLLC_BASE 0x8043 #define PLLC_OUT 0x84[all …]