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/OK3568_Linux_fs/kernel/drivers/soc/rockchip/
H A Drk_camera_sensor_info.h119 #define ov7675_FULL_RESOLUTION 0x30000 /* 0.3 megapixel */
120 #define ov9650_FULL_RESOLUTION 0x130000 /* 1.3 megapixel */
121 #define ov2640_FULL_RESOLUTION 0x200000 /* 2 megapixel */
122 #define ov2655_FULL_RESOLUTION 0x200000
123 #define ov2659_FULL_RESOLUTION 0x200000
124 #define gc2145_FULL_RESOLUTION 0x200000
125 #define gc2155_FULL_RESOLUTION 0x200000
127 #define ov2660_FULL_RESOLUTION 0x200000
129 #define ov7690_FULL_RESOLUTION 0x300000
130 #define ov3640_FULL_RESOLUTION 0x300000
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/pci/
H A Dgk104.c29 return (nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x4) == 0x4 ? 2 : 1; in gk104_pcie_version_supported()
40 nvkm_mask(device, 0x8c1c0, 0x30000, 0x10000); in gk104_pcie_set_cap_speed()
44 nvkm_mask(device, 0x8c1c0, 0x30000, 0x20000); in gk104_pcie_set_cap_speed()
48 nvkm_mask(device, 0x8c1c0, 0x30000, 0x30000); in gk104_pcie_set_cap_speed()
58 if (speed == 0) in gk104_pcie_cap_speed()
62 int speed2 = nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x30000; in gk104_pcie_cap_speed()
64 case 0x00000: in gk104_pcie_cap_speed()
65 case 0x10000: in gk104_pcie_cap_speed()
67 case 0x20000: in gk104_pcie_cap_speed()
69 case 0x30000: in gk104_pcie_cap_speed()
[all …]
H A Dg84.c39 return (nvkm_rd32(device, 0x00154c) & 0x1) + 1; in g84_pcie_version()
46 nvkm_mask(device, 0x00154c, 0x1, (ver >= 2 ? 0x1 : 0x0)); in g84_pcie_set_version()
53 nvkm_mask(device, 0x00154c, 0x80, full_speed ? 0x80 : 0x0); in g84_pcie_set_cap_speed()
59 u32 reg_v = nvkm_pci_rd32(pci, 0x88) & 0x30000; in g84_pcie_cur_speed()
61 case 0x30000: in g84_pcie_cur_speed()
63 case 0x20000: in g84_pcie_cur_speed()
65 case 0x10000: in g84_pcie_cur_speed()
74 u32 reg_v = nvkm_pci_rd32(pci, 0x460) & 0x3300; in g84_pcie_max_speed()
75 if (reg_v == 0x2200) in g84_pcie_max_speed()
86 mask_value = 0x20; in g84_pcie_set_link_speed()
[all …]
/OK3568_Linux_fs/kernel/drivers/misc/habanalabs/include/goya/asic_reg/
H A Dcpu_ca53_cfg_masks.h23 #define CPU_CA53_CFG_ARM_CFG_AA64NAA32_SHIFT 0
24 #define CPU_CA53_CFG_ARM_CFG_AA64NAA32_MASK 0x3
26 #define CPU_CA53_CFG_ARM_CFG_END_MASK 0x30
28 #define CPU_CA53_CFG_ARM_CFG_TE_MASK 0x300
30 #define CPU_CA53_CFG_ARM_CFG_VINITHI_MASK 0x3000
33 #define CPU_CA53_CFG_RST_ADDR_LSB_VECTOR_SHIFT 0
34 #define CPU_CA53_CFG_RST_ADDR_LSB_VECTOR_MASK 0xFFFFFFFF
37 #define CPU_CA53_CFG_RST_ADDR_MSB_VECTOR_SHIFT 0
38 #define CPU_CA53_CFG_RST_ADDR_MSB_VECTOR_MASK 0xFF
41 #define CPU_CA53_CFG_ARM_RST_CONTROL_NCPUPORESET_SHIFT 0
[all …]
/OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/
H A Dpq3-sec4.4-0.dtsi2 * PQ3 Sec/Crypto 4.4 device tree stub [ controller @ offset 0x30000 ]
36 compatible = "fsl,sec-v4.4", "fsl,sec-v4.0";
40 ranges = <0x0 0x30000 0x10000>;
41 reg = <0x30000 0x10000>;
42 interrupts = <58 2 0 0>;
45 compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
46 reg = <0x1000 0x1000>;
47 interrupts = <45 2 0 0>;
51 compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
52 reg = <0x2000 0x1000>;
[all …]
H A Dpq3-sec2.1-0.dtsi2 * PQ3 Sec/Crypto 2.1 device tree stub [ controller @ offset 0x30000 ]
36 compatible = "fsl,sec2.1", "fsl,sec2.0";
37 reg = <0x30000 0x10000>;
38 interrupts = <45 2 0 0>;
41 fsl,exec-units-mask = <0xfe>;
42 fsl,descriptor-types-mask = <0x12b0ebf>;
H A Dpq3-sec3.1-0.dtsi2 * PQ3 Sec/Crypto 3.1 device tree stub [ controller @ offset 0x30000 ]
36 compatible = "fsl,sec3.1", "fsl,sec3.0",
38 "fsl,sec2.0";
39 reg = <0x30000 0x10000>;
40 interrupts = <45 2 0 0 58 2 0 0>;
43 fsl,exec-units-mask = <0xbfe>;
44 fsl,descriptor-types-mask = <0x3ab0ebf>;
H A Dpq3-sec3.0-0.dtsi2 * PQ3 Sec/Crypto 3.0 device tree stub [ controller @ offset 0x30000 ]
36 compatible = "fsl,sec3.0",
38 "fsl,sec2.0";
39 reg = <0x30000 0x10000>;
40 interrupts = <45 2 0 0 58 2 0 0>;
43 fsl,exec-units-mask = <0x9fe>;
44 fsl,descriptor-types-mask = <0x3ab0ebf>;
H A Dpq3-sec3.3-0.dtsi2 * PQ3 Sec/Crypto 3.3 device tree stub [ controller @ offset 0x30000 ]
36 compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0",
38 "fsl,sec2.0";
39 reg = <0x30000 0x10000>;
40 interrupts = <45 2 0 0 58 2 0 0>;
43 fsl,exec-units-mask = <0x97c>;
44 fsl,descriptor-types-mask = <0x3a30abf>;
/OK3568_Linux_fs/kernel/arch/s390/include/asm/
H A Dspinlock.h50 return lock.lock == 0; in arch_spin_value_unlocked()
55 return READ_ONCE(lp->lock) != 0; in arch_spin_is_locked()
61 return likely(__atomic_cmpxchg_bool(&lp->lock, 0, SPINLOCK_LOCKVAL)); in arch_spin_trylock_once()
89 ALTERNATIVE("", ".long 0xb2fa0070", 49) /* NIAI 7 */ in arch_spin_unlock()
90 " sth %1,%0\n" in arch_spin_unlock()
92 : "d" (0) : "cc", "memory"); in arch_spin_unlock()
117 if (old & 0xffff0000) in arch_read_lock()
128 if (!__atomic_cmpxchg_bool(&rw->cnts, 0, 0x30000)) in arch_write_lock()
134 __atomic_add_barrier(-0x30000, &rw->cnts); in arch_write_unlock()
143 return (!(old & 0xffff0000) && in arch_read_trylock()
[all …]
/OK3568_Linux_fs/kernel/arch/mips/boot/dts/ralink/
H A Drt2880_eval.dts10 memory@0 {
12 reg = <0x8000000 0x2000000>;
21 reg = <0x1f000000 0x400000>;
28 partition@0 {
30 reg = <0x0 0x30000>;
35 reg = <0x30000 0x10000>;
40 reg = <0x40000 0x10000>;
45 reg = <0x50000 0x3b0000>;
H A Drt3052_eval.dts10 memory@0 {
12 reg = <0x0 0x2000000>;
21 reg = <0x1f000000 0x800000>;
28 partition@0 {
30 reg = <0x0 0x30000>;
35 reg = <0x30000 0x10000>;
40 reg = <0x40000 0x10000>;
45 reg = <0x50000 0x7b0000>;
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dkirkwood-dir665.dts18 reg = <0x00000000 0x8000000>; /* 128 MB */
28 pinctrl-0 =< &pmx_led_usb
81 m25p80@0 {
86 reg = <0>;
88 partition@0 {
90 reg = <0x0 0x30000>;
96 reg = <0x30000 0x10000>;
102 reg = <0x40000 0x180000>;
107 reg = <0x1c0000 0xe00000>;
112 reg = <0xfc0000 0x10000>;
[all …]
H A Dorion5x-linkstation.dtsi55 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
56 <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
57 <MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x40000>;
67 #size-cells = <0>;
68 pinctrl-0 = <&pmx_power_usb &pmx_power_hdd>;
109 flash@0 {
111 reg = <0 0x40000>;
119 header@0 {
120 reg = <0 0x30000>;
125 reg = <0x30000 0xF000>;
[all …]
H A Dpicoxcell-pc3x2.dtsi12 #address-cells = <0>;
13 #size-cells = <0>;
31 pclk: clock@0 {
43 ranges = <0 0x80000000 0x400000>;
47 reg = <0x30000 0x10000>;
54 reg = <0x40000 0x10000>;
61 reg = <0x50000 0x10000>;
69 reg = <0x60000 0x1000>;
76 reg = <0x64000 0x1000>;
82 reg = <0x80000 0x10000>;
[all …]
H A Drk3308b-evb-amic-v10-aarch32.dts14 reg = <0x0 0x30000 0x0 0x20000>;
15 record-size = <0x00000>;
16 console-size = <0x20000>;
H A Drk3308bs-evb-amic-v11-aarch32.dts14 reg = <0x0 0x30000 0x0 0x20000>;
18 record-size = <0x0 0x00000>;
19 console-size = <0x0 0x20000>;
/OK3568_Linux_fs/kernel/drivers/staging/mt7621-dts/
H A Dgbpc2.dts12 memory@0 {
14 reg = <0x00000000 0x1c000000>,
15 <0x20000000 0x04000000>;
46 m25p80@0 {
50 reg = <0>;
54 partition@0 {
56 reg = <0x0 0x30000>;
62 reg = <0x30000 0x10000>;
68 reg = <0x40000 0x10000>;
74 reg = <0x50000 0x1fb0000>;
[all …]
H A Dgbpc1.dts12 memory@0 {
14 reg = <0x00000000 0x1c000000>,
15 <0x20000000 0x04000000>;
62 m25p80@0 {
66 reg = <0>;
70 partition@0 {
72 reg = <0x0 0x30000>;
78 reg = <0x30000 0x10000>;
84 reg = <0x40000 0x10000>;
90 reg = <0x50000 0x1fb0000>;
[all …]
/OK3568_Linux_fs/kernel/drivers/clk/imx/
H A Dclk-imx8qxp-lpcg.h11 #define LSIO_PWM_0_LPCG 0x00000
12 #define LSIO_PWM_1_LPCG 0x10000
13 #define LSIO_PWM_2_LPCG 0x20000
14 #define LSIO_PWM_3_LPCG 0x30000
15 #define LSIO_PWM_4_LPCG 0x40000
16 #define LSIO_PWM_5_LPCG 0x50000
17 #define LSIO_PWM_6_LPCG 0x60000
18 #define LSIO_PWM_7_LPCG 0x70000
19 #define LSIO_GPIO_0_LPCG 0x80000
20 #define LSIO_GPIO_1_LPCG 0x90000
[all …]
/OK3568_Linux_fs/u-boot/doc/SPI/
H A DREADME.ti_qspi_dra_test11 U-Boot# mmc dev 0
13 U-Boot# fatload mmc 0 0x82000000 MLO
16 U-Boot# fatload mmc 0 0x83000000 u-boot.img
23 U-Boot# sf probe 0
26 U-Boot# sf erase 0 0x10000
27 SF: 65536 bytes @ 0x0 Erased: OK
28 U-Boot# sf erase 0x20000 0x10000
29 SF: 65536 bytes @ 0x20000 Erased: OK
30 U-Boot# sf erase 0x30000 0x10000
31 SF: 65536 bytes @ 0x30000 Erased: OK
[all …]
/OK3568_Linux_fs/kernel/drivers/video/rockchip/rve/
H A Drve_reg.c35 for (i = 0; i < RVE_RESET_TIMEOUT; i++) { in rve_soft_reset()
37 if (reg & 0x2) { in rve_soft_reset()
41 rve_write(0x30000, RVE_SWREG3_IVE_IDLE_PRC_STA, scheduler); in rve_soft_reset()
44 rve_write(0xff0000, RVE_SWREG6_IVE_WORK_STA, scheduler); in rve_soft_reset()
47 rve_write(0x30000, RVE_SWREG1_IVE_IRQ, scheduler); in rve_soft_reset()
69 int ret = 0; in rve_init_reg()
81 uint32_t sys_reg[8] = {0}; in rve_dump_read_back_reg()
82 uint32_t ltb_reg[12] = {0}; in rve_dump_read_back_reg()
83 uint32_t cfg_reg[40] = {0}; in rve_dump_read_back_reg()
84 uint32_t mmu_reg[12] = {0}; in rve_dump_read_back_reg()
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-dove/
H A Ddove.h19 * e0000000 @runtime 128M PCIe-0 Memory space
23 * f2000000 fee00000 1M PCIe-0 I/O space
27 #define DOVE_CESA_PHYS_BASE 0xc8000000
28 #define DOVE_CESA_VIRT_BASE IOMEM(0xfdb00000)
31 #define DOVE_PCIE0_MEM_PHYS_BASE 0xe0000000
34 #define DOVE_PCIE1_MEM_PHYS_BASE 0xe8000000
37 #define DOVE_BOOTROM_PHYS_BASE 0xf8000000
40 #define DOVE_SCRATCHPAD_PHYS_BASE 0xf0000000
41 #define DOVE_SCRATCHPAD_VIRT_BASE IOMEM(0xfdd00000)
44 #define DOVE_SB_REGS_PHYS_BASE 0xf1000000
[all …]
/OK3568_Linux_fs/u-boot/arch/x86/cpu/broadwell/
H A DKconfig24 default 0xff7c0000
27 default 0x40000
30 default 0x30000
39 default 0x800000
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_sh_mask.h27 #define PIPE0_PG_CONFIG__PIPE0_POWER_FORCEON_MASK 0x1
28 #define PIPE0_PG_CONFIG__PIPE0_POWER_FORCEON__SHIFT 0x0
29 #define PIPE0_PG_ENABLE__PIPE0_POWER_GATE_MASK 0x1
30 #define PIPE0_PG_ENABLE__PIPE0_POWER_GATE__SHIFT 0x0
31 #define PIPE0_PG_STATUS__PIPE0_PGFSM_READ_DATA_MASK 0xffffff
32 #define PIPE0_PG_STATUS__PIPE0_PGFSM_READ_DATA__SHIFT 0x0
33 #define PIPE0_PG_STATUS__PIPE0_DEBUG_PWR_STATUS_MASK 0x3000000
34 #define PIPE0_PG_STATUS__PIPE0_DEBUG_PWR_STATUS__SHIFT 0x18
35 #define PIPE0_PG_STATUS__PIPE0_DESIRED_PWR_STATE_MASK 0x10000000
36 #define PIPE0_PG_STATUS__PIPE0_DESIRED_PWR_STATE__SHIFT 0x1c
[all …]

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