Home
last modified time | relevance | path

Searched +full:0 +full:x18 (Results 1 – 25 of 1091) sorted by relevance

12345678910>>...44

/OK3568_Linux_fs/kernel/lib/fonts/
H A Dfont_sun8x16.c7 { 0, 0, FONTDATAMAX, 0 }, {
8 /* */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
9 /* */ 0x00,0x00,0x7e,0x81,0xa5,0x81,0x81,0xbd,0x99,0x81,0x81,0x7e,0x00,0x00,0x00,0x00,
10 /* */ 0x00,0x00,0x7e,0xff,0xdb,0xff,0xff,0xc3,0xe7,0xff,0xff,0x7e,0x00,0x00,0x00,0x00,
11 /* */ 0x00,0x00,0x00,0x00,0x6c,0xfe,0xfe,0xfe,0xfe,0x7c,0x38,0x10,0x00,0x00,0x00,0x00,
12 /* */ 0x00,0x00,0x00,0x00,0x10,0x38,0x7c,0xfe,0x7c,0x38,0x10,0x00,0x00,0x00,0x00,0x00,
13 /* */ 0x00,0x00,0x00,0x18,0x3c,0x3c,0xe7,0xe7,0xe7,0x18,0x18,0x3c,0x00,0x00,0x00,0x00,
14 /* */ 0x00,0x00,0x00,0x18,0x3c,0x7e,0xff,0xff,0x7e,0x18,0x18,0x3c,0x00,0x00,0x00,0x00,
15 /* */ 0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x3c,0x3c,0x18,0x00,0x00,0x00,0x00,0x00,0x00,
16 /* */ 0xff,0xff,0xff,0xff,0xff,0xff,0xe7,0xc3,0xc3,0xe7,0xff,0xff,0xff,0xff,0xff,0xff,
[all …]
H A Dfont_acorn_8x8.c9 { 0, 0, FONTDATAMAX, 0 }, {
10 /* 00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ^@ */
11 /* 01 */ 0x7e, 0x81, 0xa5, 0x81, 0xbd, 0x99, 0x81, 0x7e, /* ^A */
12 /* 02 */ 0x7e, 0xff, 0xbd, 0xff, 0xc3, 0xe7, 0xff, 0x7e, /* ^B */
13 /* 03 */ 0x6c, 0xfe, 0xfe, 0xfe, 0x7c, 0x38, 0x10, 0x00, /* ^C */
14 /* 04 */ 0x10, 0x38, 0x7c, 0xfe, 0x7c, 0x38, 0x10, 0x00, /* ^D */
15 /* 05 */ 0x00, 0x18, 0x3c, 0xe7, 0xe7, 0x3c, 0x18, 0x00, /* ^E */
16 /* 06 */ 0x00, 0x00, 0x3c, 0x3c, 0x3c, 0x3c, 0x00, 0x00,
17 /* 07 */ 0x00, 0x00, 0x3c, 0x3c, 0x3c, 0x3c, 0x00, 0x00,
18 /* 08 */ 0x00, 0x00, 0x3c, 0x3c, 0x3c, 0x3c, 0x00, 0x00,
[all …]
H A Dfont_pearl_8x8.c18 { 0, 0, FONTDATAMAX, 0 }, {
19 /* 0 0x00 '^@' */
20 0x00, /* 00000000 */
21 0x00, /* 00000000 */
22 0x00, /* 00000000 */
23 0x00, /* 00000000 */
24 0x00, /* 00000000 */
25 0x00, /* 00000000 */
26 0x00, /* 00000000 */
27 0x00, /* 00000000 */
[all …]
H A Dfont_8x8.c13 { 0, 0, FONTDATAMAX, 0 }, {
14 /* 0 0x00 '^@' */
15 0x00, /* 00000000 */
16 0x00, /* 00000000 */
17 0x00, /* 00000000 */
18 0x00, /* 00000000 */
19 0x00, /* 00000000 */
20 0x00, /* 00000000 */
21 0x00, /* 00000000 */
22 0x00, /* 00000000 */
[all …]
H A Dfont_8x16.c14 { 0, 0, FONTDATAMAX, 0 }, {
15 /* 0 0x00 '^@' */
16 0x00, /* 00000000 */
17 0x00, /* 00000000 */
18 0x00, /* 00000000 */
19 0x00, /* 00000000 */
20 0x00, /* 00000000 */
21 0x00, /* 00000000 */
22 0x00, /* 00000000 */
23 0x00, /* 00000000 */
[all …]
/OK3568_Linux_fs/kernel/arch/sparc/kernel/
H A Dbtext.c46 unsigned long address = 0; in btext_initialize()
49 if (prom_getproperty(node, "width", (char *)&width, 4) < 0) in btext_initialize()
51 if (prom_getproperty(node, "height", (char *)&height, 4) < 0) in btext_initialize()
53 if (prom_getproperty(node, "depth", (char *)&depth, 4) < 0) in btext_initialize()
57 if (prom_getproperty(node, "linebytes", (char *)&prop, 4) >= 0 && in btext_initialize()
58 prop != 0xffffffffu) in btext_initialize()
62 pitch = 0x1000; in btext_initialize()
64 if (prom_getproperty(node, "address", (char *)&prop, 4) >= 0) in btext_initialize()
70 if (address == 0) in btext_initialize()
73 g_loc_X = 0; in btext_initialize()
[all …]
/OK3568_Linux_fs/kernel/arch/powerpc/kernel/
H A Dbtext.c42 unsigned long disp_BAT[2] __initdata = {0, 0};
48 int boot_text_mapped __force_data = 0;
49 int force_printk_to_btext = 0;
76 * The display is mapped to virtual address 0xD0000000, rather
78 * in the region starting at 0xC0000000 (PAGE_OFFSET).
89 unsigned long vaddr = PAGE_OFFSET + 0x10000000; in btext_prepare_BAT()
95 boot_text_mapped = 0; in btext_prepare_BAT()
98 lowbits = addr & ~0xFF000000UL; in btext_prepare_BAT()
99 addr &= 0xFF000000UL; in btext_prepare_BAT()
100 disp_BAT[0] = vaddr | (BL_16M<<2) | 2; in btext_prepare_BAT()
[all …]
/OK3568_Linux_fs/kernel/drivers/media/usb/gspca/
H A Ddtcs033.c32 if (gspca_dev->usb_err < 0) in reg_rw()
36 usb_rcvctrlpipe(udev, 0), in reg_rw()
42 if (ret < 0) { in reg_rw()
53 int i = 0; in reg_reqs()
56 while ((i < n_reqs) && (gspca_dev->usb_err >= 0)) { in reg_reqs()
63 if (gspca_dev->usb_err < 0) { in reg_reqs()
111 return 0; in sd_config()
117 return 0; in sd_init()
137 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0); in dtcs033_pkt_scan()
141 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0); in dtcs033_pkt_scan()
[all …]
/OK3568_Linux_fs/u-boot/include/
H A Dvideo_font_data.h18 /* 0 0x00 '^@' */
19 0x00, /* 00000000 */
20 0x00, /* 00000000 */
21 0x00, /* 00000000 */
22 0x00, /* 00000000 */
23 0x00, /* 00000000 */
24 0x00, /* 00000000 */
25 0x00, /* 00000000 */
26 0x00, /* 00000000 */
27 0x00, /* 00000000 */
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_1_sh_mask.h27 #define MC_CONFIG__MCDW_WR_ENABLE_MASK 0x1
28 #define MC_CONFIG__MCDW_WR_ENABLE__SHIFT 0x0
29 #define MC_CONFIG__MCDX_WR_ENABLE_MASK 0x2
30 #define MC_CONFIG__MCDX_WR_ENABLE__SHIFT 0x1
31 #define MC_CONFIG__MCDY_WR_ENABLE_MASK 0x4
32 #define MC_CONFIG__MCDY_WR_ENABLE__SHIFT 0x2
33 #define MC_CONFIG__MCDZ_WR_ENABLE_MASK 0x8
34 #define MC_CONFIG__MCDZ_WR_ENABLE__SHIFT 0x3
35 #define MC_CONFIG__MCDS_WR_ENABLE_MASK 0x10
36 #define MC_CONFIG__MCDS_WR_ENABLE__SHIFT 0x4
[all …]
H A Dgmc_8_1_sh_mask.h27 #define MC_CONFIG__MCDW_WR_ENABLE_MASK 0x1
28 #define MC_CONFIG__MCDW_WR_ENABLE__SHIFT 0x0
29 #define MC_CONFIG__MCDX_WR_ENABLE_MASK 0x2
30 #define MC_CONFIG__MCDX_WR_ENABLE__SHIFT 0x1
31 #define MC_CONFIG__MCDY_WR_ENABLE_MASK 0x4
32 #define MC_CONFIG__MCDY_WR_ENABLE__SHIFT 0x2
33 #define MC_CONFIG__MCDZ_WR_ENABLE_MASK 0x8
34 #define MC_CONFIG__MCDZ_WR_ENABLE__SHIFT 0x3
35 #define MC_CONFIG__MCDS_WR_ENABLE_MASK 0x10
36 #define MC_CONFIG__MCDS_WR_ENABLE__SHIFT 0x4
[all …]
H A Dgmc_7_0_sh_mask.h27 #define MC_CONFIG__MCDW_WR_ENABLE_MASK 0x1
28 #define MC_CONFIG__MCDW_WR_ENABLE__SHIFT 0x0
29 #define MC_CONFIG__MCDX_WR_ENABLE_MASK 0x2
30 #define MC_CONFIG__MCDX_WR_ENABLE__SHIFT 0x1
31 #define MC_CONFIG__MCDY_WR_ENABLE_MASK 0x4
32 #define MC_CONFIG__MCDY_WR_ENABLE__SHIFT 0x2
33 #define MC_CONFIG__MCDZ_WR_ENABLE_MASK 0x8
34 #define MC_CONFIG__MCDZ_WR_ENABLE__SHIFT 0x3
35 #define MC_CONFIG__MC_RD_ENABLE_MASK 0x30
36 #define MC_CONFIG__MC_RD_ENABLE__SHIFT 0x4
[all …]
/OK3568_Linux_fs/kernel/include/linux/mlx5/
H A Dmlx5_ifc.h38 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822bs/hal/rtl8822b/
H A Dhal8822b_fw.c25 0x22, 0x88, 0x00, 0x00, 0x1E, 0x00, 0x0B, 0x00,
26 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00,
27 0x08, 0x1D, 0x0B, 0x16, 0xE3, 0x07, 0x00, 0x00,
28 0x08, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00,
29 0x00, 0x00, 0x20, 0x80, 0xF8, 0x25, 0x00, 0x00,
30 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
31 0x18, 0x7B, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
32 0x00, 0x10, 0x12, 0x80, 0x00, 0x00, 0x00, 0x80,
33 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
34 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_0_sh_mask.h27 #define GCK_SMC_IND_INDEX__SMC_IND_ADDR_MASK 0xffffffff
28 #define GCK_SMC_IND_INDEX__SMC_IND_ADDR__SHIFT 0x0
29 #define GCK_SMC_IND_DATA__SMC_IND_DATA_MASK 0xffffffff
30 #define GCK_SMC_IND_DATA__SMC_IND_DATA__SHIFT 0x0
31 #define CG_DCLK_CNTL__DCLK_DIVIDER_MASK 0x7f
32 #define CG_DCLK_CNTL__DCLK_DIVIDER__SHIFT 0x0
33 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_EN_MASK 0x100
34 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_EN__SHIFT 0x8
35 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_TOG_MASK 0x200
36 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_TOG__SHIFT 0x9
[all …]
H A Dsmu_7_1_2_sh_mask.h27 #define GCK_SMC_IND_INDEX__SMC_IND_ADDR_MASK 0xffffffff
28 #define GCK_SMC_IND_INDEX__SMC_IND_ADDR__SHIFT 0x0
29 #define GCK_SMC_IND_DATA__SMC_IND_DATA_MASK 0xffffffff
30 #define GCK_SMC_IND_DATA__SMC_IND_DATA__SHIFT 0x0
31 #define CG_DCLK_CNTL__DCLK_DIVIDER_MASK 0x7f
32 #define CG_DCLK_CNTL__DCLK_DIVIDER__SHIFT 0x0
33 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_EN_MASK 0x100
34 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_EN__SHIFT 0x8
35 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_TOG_MASK 0x200
36 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_TOG__SHIFT 0x9
[all …]
H A Dsmu_7_1_3_sh_mask.h27 #define GCK_SMC_IND_INDEX__SMC_IND_ADDR_MASK 0xffffffff
28 #define GCK_SMC_IND_INDEX__SMC_IND_ADDR__SHIFT 0x0
29 #define GCK_SMC_IND_DATA__SMC_IND_DATA_MASK 0xffffffff
30 #define GCK_SMC_IND_DATA__SMC_IND_DATA__SHIFT 0x0
31 #define GCK_MCLK_FUSES__StartupMClkDid_MASK 0x7f
32 #define GCK_MCLK_FUSES__StartupMClkDid__SHIFT 0x0
33 #define GCK_MCLK_FUSES__MClkADCA_MASK 0x780
34 #define GCK_MCLK_FUSES__MClkADCA__SHIFT 0x7
35 #define GCK_MCLK_FUSES__MClkDDCA_MASK 0x1800
36 #define GCK_MCLK_FUSES__MClkDDCA__SHIFT 0xb
[all …]
H A Dsmu_7_0_1_sh_mask.h27 #define GCK_SMC_IND_INDEX__SMC_IND_ADDR_MASK 0xffffffff
28 #define GCK_SMC_IND_INDEX__SMC_IND_ADDR__SHIFT 0x0
29 #define GCK_SMC_IND_DATA__SMC_IND_DATA_MASK 0xffffffff
30 #define GCK_SMC_IND_DATA__SMC_IND_DATA__SHIFT 0x0
31 #define CG_DCLK_CNTL__DCLK_DIVIDER_MASK 0x7f
32 #define CG_DCLK_CNTL__DCLK_DIVIDER__SHIFT 0x0
33 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_EN_MASK 0x100
34 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_EN__SHIFT 0x8
35 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_TOG_MASK 0x200
36 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_TOG__SHIFT 0x9
[all …]
H A Dsmu_7_1_0_sh_mask.h27 #define GCK_SMC_IND_INDEX__SMC_IND_ADDR_MASK 0xffffffff
28 #define GCK_SMC_IND_INDEX__SMC_IND_ADDR__SHIFT 0x0
29 #define GCK_SMC_IND_DATA__SMC_IND_DATA_MASK 0xffffffff
30 #define GCK_SMC_IND_DATA__SMC_IND_DATA__SHIFT 0x0
31 #define CG_DCLK_CNTL__DCLK_DIVIDER_MASK 0x7f
32 #define CG_DCLK_CNTL__DCLK_DIVIDER__SHIFT 0x0
33 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_EN_MASK 0x100
34 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_EN__SHIFT 0x8
35 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_TOG_MASK 0x200
36 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_TOG__SHIFT 0x9
[all …]
H A Dsmu_7_1_1_sh_mask.h27 #define GCK_SMC_IND_INDEX__SMC_IND_ADDR_MASK 0xffffffff
28 #define GCK_SMC_IND_INDEX__SMC_IND_ADDR__SHIFT 0x0
29 #define GCK_SMC_IND_DATA__SMC_IND_DATA_MASK 0xffffffff
30 #define GCK_SMC_IND_DATA__SMC_IND_DATA__SHIFT 0x0
31 #define CG_DCLK_CNTL__DCLK_DIVIDER_MASK 0x7f
32 #define CG_DCLK_CNTL__DCLK_DIVIDER__SHIFT 0x0
33 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_EN_MASK 0x100
34 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_EN__SHIFT 0x8
35 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_TOG_MASK 0x200
36 #define CG_DCLK_CNTL__DCLK_DIR_CNTL_TOG__SHIFT 0x9
[all …]
/OK3568_Linux_fs/kernel/sound/usb/usx2y/
H A Dusbusx2yaudio.c62 int i, len, lens = 0, hwptr_done = subs->hwptr_done; in usx2y_urb_capt_retire()
65 for (i = 0; i < nr_of_packs(); i++) { in usx2y_urb_capt_retire()
75 snd_printd("0 == len ERROR!\n"); in usx2y_urb_capt_retire()
101 return 0; in usx2y_urb_capt_retire()
121 count = 0; in usx2y_urb_play_prepare()
122 for (pack = 0; pack < nr_of_packs(); pack++) { in usx2y_urb_play_prepare()
134 0; in usx2y_urb_play_prepare()
160 return 0; in usx2y_urb_play_prepare()
191 if ((err = usb_submit_urb(urb, GFP_ATOMIC)) < 0) { in usx2y_urb_submit()
195 return 0; in usx2y_urb_submit()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/rtl8822b/
H A Dhalhwimg8822b_fw.c36 0x22, 0x88, 0x00, 0x00, 0x04, 0x00, 0x01, 0x00, 0xC9, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
37 0x03, 0x1B, 0x10, 0x33, 0xE0, 0x07, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
38 0x00, 0x00, 0x20, 0x80, 0x88, 0x23, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
39 0xB0, 0xDD, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x12, 0x80, 0x00, 0x00, 0x00, 0x80,
40 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
41 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
42 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
43 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
44 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2D, 0x31, 0x00, 0x80, 0x39, 0x06, 0x00, 0x80,
45 0x03, 0x02, 0x01, 0xFE, 0x03, 0x03, 0x01, 0xFE, 0x03, 0x04, 0x01, 0xFE, 0x03, 0x05, 0x01, 0xFE,
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dam335x-pocketbeagle.dts22 pinctrl-0 = <&usr_leds_pins>;
121 "[USR LED 0]",
210 pinctrl-0 = < &P2_03_gpio &P1_34_gpio &P2_19_gpio &P2_24_gpio
215 /* P2_03 (ZCZ ball T10) gpio0_23 0x824 PIN 9 */
220 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
221 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
224 /* P1_34 (ZCZ ball T11) gpio0_26 0x828 PIN 10 */
229 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
230 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
233 /* P2_19 (ZCZ ball U12) gpio0_27 0x82c PIN 11 */
[all …]
/OK3568_Linux_fs/u-boot/lib/tizen/
H A Dtizen_logo_16bpp.h20 0x42,0x4d,0xa6,0xee,0x01,0x00,0x00,0x00,0x00,0x00,0x46,0x00,0x00,0x00,0x38,0x00,
21 0x00,0x00,0xc4,0x01,0x00,0x00,0x8c,0x00,0x00,0x00,0x01,0x00,0x10,0x00,0x03,0x00,
22 0x00,0x00,0x60,0xee,0x01,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
23 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xf8,0x00,0x00,0xe0,0x07,0x00,0x00,0x1f,0x00,
24 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
25 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
26 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
27 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
28 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
29 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/kvm/hyp/nvhe/
H A Dhost.S25 stp x2, x3, [x0, #CPU_XREG_OFFSET(0)]
34 /* Store the host regs x18-x29, lr */
43 ldp x0, x1, [x29, #CPU_XREG_OFFSET(0)]
56 /* Restore host regs x18-x29, lr */
132 .if ((.L__vect_end\@ - .L__vect_start\@) > 0x80)
203 * Use x18 to keep the pointer to the host context because
204 * x18 is callee-saved in SMCCC but not in AAPCS64.
206 mov x18, x0
208 ldp x0, x1, [x18, #CPU_XREG_OFFSET(0)]
209 ldp x2, x3, [x18, #CPU_XREG_OFFSET(2)]
[all …]

12345678910>>...44