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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/can/
H A Dbosch,m_can.yaml65 0x0 if you're using a private Message RAM. The remain cells
69 11-bit Filter 0-128 elements / 0-128 words
70 29-bit Filter 0-64 elements / 0-128 words
71 Rx FIFO 0 0-64 elements / 0-1152 words
72 Rx FIFO 1 0-64 elements / 0-1152 words
73 Rx Buffers 0-64 elements / 0-1152 words
74 Tx Event FIFO 0-32 elements / 0-64 words
75 Tx Buffers 0-32 elements / 0-576 words
83 the following elements start from. This is usually set to 0x0 if
85 default: 0
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dimx6sll.dtsi44 #size-cells = <0>;
46 cpu0: cpu@0 {
49 reg = <0>;
85 reg = <0x00a01000 0x1000>,
86 <0x00a00100 0x100>;
92 #size-cells = <0>;
94 ckil: clock@0 {
96 reg = <0>;
97 #clock-cells = <0>;
105 #clock-cells = <0>;
[all …]
H A Dimx6ul.dtsi54 #size-cells = <0>;
56 cpu0: cpu@0 {
59 reg = <0>;
97 reg = <0x00a01000 0x1000>,
98 <0x00a02000 0x1000>,
99 <0x00a04000 0x2000>,
100 <0x00a06000 0x2000>;
105 #clock-cells = <0>;
112 #clock-cells = <0>;
119 #clock-cells = <0>;
[all …]
H A Dimx6sl.dtsi24 memory { device_type = "memory"; reg = <0 0>; };
48 #size-cells = <0>;
50 cpu@0 {
53 reg = <0x0>;
83 reg = <0x00a01000 0x1000>,
84 <0x00a00100 0x100>;
90 #size-cells = <0>;
94 #clock-cells = <0>;
100 #clock-cells = <0>;
114 reg = <0x00900000 0x20000>;
[all …]
H A Dimx6ull.dtsi51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0>;
88 reg = <0x00a01000 0x1000>,
89 <0x00a02000 0x100>;
94 #size-cells = <0>;
96 ckil: clock@0 {
98 reg = <0>;
99 #clock-cells = <0>;
107 #clock-cells = <0>;
[all …]
H A Dimx6qdl.dtsi53 #size-cells = <0>;
57 #clock-cells = <0>;
63 #clock-cells = <0>;
64 clock-frequency = <0>;
69 #clock-cells = <0>;
83 reg = <0x00110000 0x2000>;
84 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
85 <0 13 IRQ_TYPE_LEVEL_HIGH>,
86 <0 13 IRQ_TYPE_LEVEL_HIGH>,
87 <0 13 IRQ_TYPE_LEVEL_HIGH>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dimx6sll.dtsi45 #size-cells = <0>;
47 cpu0: cpu@0 {
50 reg = <0>;
82 #clock-cells = <0>;
89 #clock-cells = <0>;
96 #clock-cells = <0>;
97 clock-frequency = <0>;
103 #clock-cells = <0>;
104 clock-frequency = <0>;
117 reg = <0x00900000 0x20000>;
[all …]
H A Dimx6sl.dtsi48 #size-cells = <0>;
50 cpu@0 {
53 reg = <0x0>;
85 #clock-cells = <0>;
91 #clock-cells = <0>;
99 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
104 #phy-cells = <0>;
116 reg = <0x00900000 0x20000>;
117 ranges = <0 0x00900000 0x20000>;
127 reg = <0x00a01000 0x1000>,
[all …]
H A Dimx6ul.dtsi56 #size-cells = <0>;
58 cpu0: cpu@0 {
61 reg = <0>;
106 #clock-cells = <0>;
113 #clock-cells = <0>;
120 #clock-cells = <0>;
121 clock-frequency = <0>;
127 #clock-cells = <0>;
128 clock-frequency = <0>;
147 reg = <0x00900000 0x20000>;
[all …]
H A Dimx6qdl.dtsi55 #clock-cells = <0>;
61 #clock-cells = <0>;
62 clock-frequency = <0>;
67 #clock-cells = <0>;
74 #size-cells = <0>;
79 lvds-channel@0 {
81 #size-cells = <0>;
82 reg = <0>;
85 port@0 {
86 reg = <0>;
[all …]