Home
last modified time | relevance | path

Searched +full:0 +full:x020e0000 (Results 1 – 13 of 13) sorted by relevance

/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mfd/
H A Dsyscon.yaml84 reg = <0x01c00000 0x1000>;
90 reg = <0x020e0000 0x38>;
/OK3568_Linux_fs/kernel/drivers/net/ethernet/dec/tulip/
H A Dmedia.c28 #define MDIO_SHIFT_CLK 0x10000
29 #define MDIO_DATA_WRITE0 0x00000
30 #define MDIO_DATA_WRITE1 0x20000
31 #define MDIO_ENB 0x00000 /* Ignore the 0x02000 databook setting. */
32 #define MDIO_ENB_IN 0x40000
33 #define MDIO_DATA_READ 0x80000
36 0xB4, 0xB8, 0xBC, 0xC0, 0xC4, 0xC8, 0xCC, 0, 0,0,0,0, 0,0,0,0,
37 0,0xD0,0,0, 0,0,0,0, 0,0,0,0, 0, 0xD4, 0xD8, 0xDC, };
51 int read_cmd = (0xf6 << 10) | ((phy_id & 0x1f) << 5) | location; in tulip_mdio_read()
52 int retval = 0; in tulip_mdio_read()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,imx-pinctrl.txt65 pinctrl-0 = <&pinctrl_usdhc4_1>;
70 reg = <0x020e0000 0x4000>;
76 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
77 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
78 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
79 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
80 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
81 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
82 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
83 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dimx6sl.dtsi24 memory { device_type = "memory"; reg = <0 0>; };
48 #size-cells = <0>;
50 cpu@0 {
53 reg = <0x0>;
83 reg = <0x00a01000 0x1000>,
84 <0x00a00100 0x100>;
90 #size-cells = <0>;
94 #clock-cells = <0>;
100 #clock-cells = <0>;
114 reg = <0x00900000 0x20000>;
[all …]
H A Dimx6qdl.dtsi53 #size-cells = <0>;
57 #clock-cells = <0>;
63 #clock-cells = <0>;
64 clock-frequency = <0>;
69 #clock-cells = <0>;
83 reg = <0x00110000 0x2000>;
84 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
85 <0 13 IRQ_TYPE_LEVEL_HIGH>,
86 <0 13 IRQ_TYPE_LEVEL_HIGH>,
87 <0 13 IRQ_TYPE_LEVEL_HIGH>;
[all …]
H A Dimx6sll.dtsi44 #size-cells = <0>;
46 cpu0: cpu@0 {
49 reg = <0>;
85 reg = <0x00a01000 0x1000>,
86 <0x00a00100 0x100>;
92 #size-cells = <0>;
94 ckil: clock@0 {
96 reg = <0>;
97 #clock-cells = <0>;
105 #clock-cells = <0>;
[all …]
H A Dimx6ul.dtsi54 #size-cells = <0>;
56 cpu0: cpu@0 {
59 reg = <0>;
97 reg = <0x00a01000 0x1000>,
98 <0x00a02000 0x1000>,
99 <0x00a04000 0x2000>,
100 <0x00a06000 0x2000>;
105 #clock-cells = <0>;
112 #clock-cells = <0>;
119 #clock-cells = <0>;
[all …]
H A Dimx6ull.dtsi51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0>;
88 reg = <0x00a01000 0x1000>,
89 <0x00a02000 0x100>;
94 #size-cells = <0>;
96 ckil: clock@0 {
98 reg = <0>;
99 #clock-cells = <0>;
107 #clock-cells = <0>;
[all …]
H A Dimx6sx.dtsi54 #size-cells = <0>;
56 cpu0: cpu@0 {
59 reg = <0>;
92 reg = <0x00a01000 0x1000>,
93 <0x00a00100 0x100>;
99 #size-cells = <0>;
101 ckil: clock@0 {
103 reg = <0>;
104 #clock-cells = <0>;
112 #clock-cells = <0>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dimx6sl.dtsi48 #size-cells = <0>;
50 cpu@0 {
53 reg = <0x0>;
85 #clock-cells = <0>;
91 #clock-cells = <0>;
99 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
104 #phy-cells = <0>;
116 reg = <0x00900000 0x20000>;
117 ranges = <0 0x00900000 0x20000>;
127 reg = <0x00a01000 0x1000>,
[all …]
H A Dimx6sll.dtsi45 #size-cells = <0>;
47 cpu0: cpu@0 {
50 reg = <0>;
82 #clock-cells = <0>;
89 #clock-cells = <0>;
96 #clock-cells = <0>;
97 clock-frequency = <0>;
103 #clock-cells = <0>;
104 clock-frequency = <0>;
117 reg = <0x00900000 0x20000>;
[all …]
H A Dimx6ul.dtsi56 #size-cells = <0>;
58 cpu0: cpu@0 {
61 reg = <0>;
106 #clock-cells = <0>;
113 #clock-cells = <0>;
120 #clock-cells = <0>;
121 clock-frequency = <0>;
127 #clock-cells = <0>;
128 clock-frequency = <0>;
147 reg = <0x00900000 0x20000>;
[all …]
H A Dimx6sx.dtsi58 #size-cells = <0>;
60 cpu0: cpu@0 {
63 reg = <0>;
97 #clock-cells = <0>;
104 #clock-cells = <0>;
111 #clock-cells = <0>;
112 clock-frequency = <0>;
118 #clock-cells = <0>;
119 clock-frequency = <0>;
125 #clock-cells = <0>;
[all …]