Home
last modified time | relevance | path

Searched defs:val (Results 1 – 25 of 381) sorted by relevance

12345678910>>...16

/rk3399_ARM-atf/plat/nvidia/tegra/drivers/flowctrl/
H A Dflowctrl.c47 static inline void tegra_fc_cc4_ctrl(int cpu_id, uint32_t val) in tegra_fc_cc4_ctrl()
53 static inline void tegra_fc_cpu_csr(int cpu_id, uint32_t val) in tegra_fc_cpu_csr()
59 static inline void tegra_fc_halt_cpu(int cpu_id, uint32_t val) in tegra_fc_halt_cpu()
67 uint32_t val; in tegra_fc_prepare_suspend() local
137 uint32_t val; in tegra_fc_cluster_idle() local
158 uint32_t val; in tegra_fc_cluster_powerdn() local
179 uint32_t val; in tegra_fc_is_ccx_allowed() local
204 uint32_t val; in tegra_fc_soc_powerdn() local
233 uint32_t val; in tegra_fc_cpu_off() local
251 uint32_t val; in tegra_fc_lock_active_cluster() local
[all …]
/rk3399_ARM-atf/drivers/arm/gic/v2/
H A Dgicv2_private.h46 uint8_t val = target & GIC_TARGET_CPU_MASK; in gicd_set_itargetsr() local
51 static inline void gicd_write_sgir(uintptr_t base, unsigned int val) in gicd_write_sgir()
114 static inline void gicc_write_ctlr(uintptr_t base, unsigned int val) in gicc_write_ctlr()
119 static inline void gicc_write_pmr(uintptr_t base, unsigned int val) in gicc_write_pmr()
124 static inline void gicc_write_BPR(uintptr_t base, unsigned int val) in gicc_write_BPR()
130 static inline void gicc_write_IAR(uintptr_t base, unsigned int val) in gicc_write_IAR()
135 static inline void gicc_write_EOIR(uintptr_t base, unsigned int val) in gicc_write_EOIR()
140 static inline void gicc_write_hppir(uintptr_t base, unsigned int val) in gicc_write_hppir()
145 static inline void gicc_write_dir(uintptr_t base, unsigned int val) in gicc_write_dir()
/rk3399_ARM-atf/plat/nvidia/tegra/soc/t210/drivers/se/
H A Dsecurity_engine.c144 uint32_t val = 0; in tegra_se_operation_complete() local
212 uint32_t val = 0; in tegra_se_operation_prepare() local
243 uint32_t val = 0; in tegra_se_context_save_atomic() local
371 uint32_t val; in tegra_se_generate_srk() local
410 uint32_t val; in tegra_se_lp_generate_random_data() local
508 uint32_t val = 0; in tegra_se_lp_sticky_bits_context_save() local
541 uint32_t val = 0; in tegra_se_aeskeytable_context_save() local
622 uint32_t val = 0; in tegra_se_lp_rsakeytable_context_save() local
705 uint32_t val = 0; in tegra_se_pkakeytable_context_save() local
758 uint32_t val; in tegra_se_lock() local
[all …]
/rk3399_ARM-atf/drivers/arm/gic/v3/
H A Dgic600ae_fmu_helpers.c19 #define GIC_FMU_WRITE_32(base, reg, val) \ argument
31 #define GIC_FMU_WRITE_64(base, reg, n, val) \ argument
66 #define GIC_FMU_WRITE_ON_IDLE_32(base, reg, val) \ argument
76 #define GIC_FMU_WRITE_ON_IDLE_64(base, reg, n, val) \ argument
203 void gic_fmu_write_errctlr(uintptr_t base, unsigned int n, uint64_t val) in gic_fmu_write_errctlr()
212 void gic_fmu_write_errstatus(uintptr_t base, unsigned int n, uint64_t val) in gic_fmu_write_errstatus()
221 void gic_fmu_write_pingctlr(uintptr_t base, uint32_t val) in gic_fmu_write_pingctlr()
229 void gic_fmu_write_pingnow(uintptr_t base, uint32_t val) in gic_fmu_write_pingnow()
238 void gic_fmu_write_smen(uintptr_t base, uint32_t val) in gic_fmu_write_smen()
248 void gic_fmu_write_sminjerr(uintptr_t base, uint32_t val) in gic_fmu_write_sminjerr()
[all …]
H A Dgicv3_private.h76 #define GICD_WRITE_8(REG, base, id, val) \ argument
79 #define GICD_WRITE(REG, base, id, val) \ argument
82 #define GICD_WRITE_64(REG, base, id, val) \ argument
137 #define GICR_WRITE_8(REG, base, id, val) \ argument
140 #define GICR_WRITE(REG, base, id, val) \ argument
317 static inline void gicr_write_ctlr(uintptr_t base, uint32_t val) in gicr_write_ctlr()
332 static inline void gicr_write_waker(uintptr_t base, uint32_t val) in gicr_write_waker()
375 static inline void gicr_write_icenabler0(uintptr_t base, unsigned int val) in gicr_write_icenabler0()
391 unsigned int val) in gicr_write_icenabler()
409 static inline void gicr_write_icfgr0(uintptr_t base, unsigned int val) in gicr_write_icfgr0()
[all …]
/rk3399_ARM-atf/drivers/marvell/
H A Dmci.c74 #define MCI_DID_GLOBAL_ASSIGN_REQ_MCI_LOCAL_ID(val) (((val) & 0xFF) << 16) argument
76 #define MCI_DID_GLOBAL_ASSIGN_REQ_MCI_COUNT(val) (((val) & 0xFF) << 8) argument
78 #define MCI_DID_GLOBAL_ASSIGN_REQ_HOPS_NUM(val) (((val) & 0xFF) << 0) argument
85 #define MCI_CTRL_RX_TX_MEM_CFG_RQ_THRESH(val) (((val) & 0xFF) << 24) argument
86 #define MCI_CTRL_RX_TX_MEM_CFG_PQ_THRESH(val) (((val) & 0xFF) << 16) argument
87 #define MCI_CTRL_RX_TX_MEM_CFG_NQ_THRESH(val) (((val) & 0xFF) << 8) argument
88 #define MCI_CTRL_RX_TX_MEM_CFG_DELTA_THRESH(val) (((val) & 0xF) << 4) argument
89 #define MCI_CTRL_RX_TX_MEM_CFG_RTC(val) (((val) & 0x3) << 2) argument
90 #define MCI_CTRL_RX_TX_MEM_CFG_WTC(val) (((val) & 0x3) << 0) argument
148 #define MCI_CTRL_MCI_PHY_SET_DLO_FIFO_FULL_TRESH(val) (((val) & 0xF) << 28) argument
[all …]
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/constraints/
H A Dmt_spm_trace.h54 #define MT_SPM_SYSRAM_W(_s, type, val, _sz) \ argument
57 #define MT_SPM_SYSRAM_R_U32(addr, val) \ argument
64 #define MT_SPM_SYSRAM_R(_s, type, val) mt_spm_sysram_read(_s, type, val) argument
76 #define MT_SPM_TRACE_COMMON_WR(_type, val, _sz) \ argument
167 #define MT_SPM_TRACE_COMMON_U32_WR(type, val) argument
168 #define MT_SPM_TRACE_COMMON_WR(val) argument
169 #define MT_SPM_TRACE_COMMON_U32_RD(type, val) argument
170 #define MT_SPM_TRACE_COMMON_RD(val) argument
173 #define MT_SPM_TRACE_SUSPEND_U32_WR(type, val) argument
174 #define MT_SPM_TRACE_SUSPEND_WR(val) argument
[all …]
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/constraints/
H A Dmt_spm_trace.h54 #define MT_SPM_SYSRAM_W(_s, type, val, _sz) \ argument
57 #define MT_SPM_SYSRAM_R_U32(addr, val) ({ \ argument
62 #define MT_SPM_SYSRAM_R(_s, type, val) \ argument
73 #define MT_SPM_TRACE_COMMON_WR(_type, val, _sz) ({ \ argument
132 #define MT_SPM_TRACE_COMMON_U32_WR(type, val) argument
133 #define MT_SPM_TRACE_COMMON_WR(val) argument
134 #define MT_SPM_TRACE_COMMON_U32_RD(type, val) argument
135 #define MT_SPM_TRACE_COMMON_RD(val) argument
138 #define MT_SPM_TRACE_SUSPEND_U32_WR(type, val) argument
139 #define MT_SPM_TRACE_SUSPEND_WR(val) argument
[all …]
/rk3399_ARM-atf/plat/mediatek/common/lpm_v2/
H A Dmt_lp_api.c9 #define UPDATE_STATUS(val, status, bit) \ argument
16 int ret, val; in mt_audio_update() local
41 int ret, val; in mt_usb_update() local
70 int ret, val; in mt_gpueb_hwctrl() local
/rk3399_ARM-atf/plat/nvidia/tegra/drivers/pmc/
H A Dpmc.c32 uint32_t val; in tegra_pmc_cpu_on() local
73 uint32_t val; in tegra_pmc_cpu_setup() local
86 uint32_t val; in tegra_pmc_lock_cpu_vectors() local
106 uint32_t val = tegra_pmc_read_32(PMC_PWRGATE_STATUS); in tegra_pmc_is_last_on_cpu() local
/rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/
H A Dplat_memctrl.c152 uint32_t val, wdata_0, wdata_1; in tegra186_memctrl_reconfig_mss_clients() local
405 uint32_t i, val; in tegra186_memctrl_set_overrides() local
614 uint32_t val; in plat_memctrl_setup() local
666 uint32_t val; in plat_memctrl_tzdram_setup() local
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/constraints/
H A Dmt_spm_rc_syspll.c117 static int update_rc_condition(int state_id, const void *val) in update_rc_condition()
136 static void update_rc_clkbuf_status(const void *val) in update_rc_clkbuf_status()
153 static void update_rc_ufs_status(const void *val) in update_rc_ufs_status()
170 static void update_rc_usb_peri(const void *val) in update_rc_usb_peri()
185 static void update_rc_usb_infra(const void *val) in update_rc_usb_infra()
200 static void update_rc_status(const void *val) in update_rc_status()
226 int spm_update_rc_syspll(int state_id, int type, const void *val) in spm_update_rc_syspll()
H A Dmt_spm_rc_bus26m.c179 static int update_rc_condition(int state_id, const void *val) in update_rc_condition()
198 static void update_rc_remain_irqs(const void *val) in update_rc_remain_irqs()
203 static void update_rc_fmaudio_adsp(int type, const void *val) in update_rc_fmaudio_adsp()
221 static void update_rc_usb_peri(const void *val) in update_rc_usb_peri()
236 static void update_rc_usb_infra(const void *val) in update_rc_usb_infra()
251 static void update_rc_status(const void *val) in update_rc_status()
277 int spm_update_rc_bus26m(int state_id, int type, const void *val) in spm_update_rc_bus26m()
/rk3399_ARM-atf/drivers/imx/uart/
H A Dimx_uart.c55 static void write_reg(uintptr_t base, uint32_t offset, uint32_t val) in write_reg()
68 uint32_t val; in console_imx_uart_core_init() local
134 uint32_t val; in console_imx_uart_core_putc() local
160 uint32_t val; in console_imx_uart_core_getc() local
/rk3399_ARM-atf/include/lib/el3_runtime/
H A Dcontext_el2.h233 #define write_el2_ctx_common(ctx, reg, val) ((((ctx)->common).reg) \ argument
236 #define write_el2_ctx_common_sysreg128(ctx, reg, val) ((((ctx)->common).reg) \ argument
241 #define write_el2_ctx_mte2(ctx, reg, val) ((((ctx)->mte2).reg) \ argument
245 #define write_el2_ctx_mte2(ctx, reg, val) argument
250 #define write_el2_ctx_fgt(ctx, reg, val) ((((ctx)->fgt).reg) \ argument
254 #define write_el2_ctx_fgt(ctx, reg, val) argument
259 #define write_el2_ctx_fgt2(ctx, reg, val) ((((ctx)->fgt2).reg) \ argument
263 #define write_el2_ctx_fgt2(ctx, reg, val) argument
268 #define write_el2_ctx_ecv(ctx, reg, val) ((((ctx)->ecv).reg) \ argument
272 #define write_el2_ctx_ecv(ctx, reg, val) argument
[all …]
H A Dcontext_el1.h193 #define write_el1_ctx_common(ctx, reg, val) ((((ctx)->common).reg) \ argument
196 #define write_el1_ctx_common_sysreg128(ctx, reg, val) ((((ctx)->common).reg) \ argument
200 #define write_el1_ctx_arch_timer(ctx, reg, val) ((((ctx)->arch_timer).reg) \ argument
205 #define write_el1_ctx_aarch32(ctx, reg, val) ((((ctx)->el1_aarch32).reg) \ argument
209 #define write_el1_ctx_aarch32(ctx, reg, val) argument
214 #define write_el1_ctx_mte2(ctx, reg, val) ((((ctx)->mte2).reg) \ argument
218 #define write_el1_ctx_mte2(ctx, reg, val) argument
223 #define write_el1_ctx_ras(ctx, reg, val) ((((ctx)->ras).reg) \ argument
227 #define write_el1_ctx_ras(ctx, reg, val) argument
232 #define write_el1_ctx_s1pie(ctx, reg, val) ((((ctx)->s1pie).reg) \ argument
[all …]
/rk3399_ARM-atf/include/services/
H A Ddrtm_svc.h118 #define ARM_DRTM_TPM_FEATURES_SET_PCR_SCHEMA(reg, val) \ argument
126 #define ARM_DRTM_TPM_FEATURES_SET_TPM_HASH(reg, val) \ argument
134 #define ARM_DRTM_TPM_FEATURES_SET_FW_HASH(reg, val) \ argument
142 #define ARM_DRTM_MIN_MEM_REQ_SET_DCE_SIZE(reg, val) \ argument
150 #define ARM_DRTM_MIN_MEM_REQ_SET_MIN_DLME_DATA_SIZE(reg, val) \ argument
159 #define ARM_DRTM_DMA_PROT_FEATURES_SET_MAX_REGIONS(reg, val) \ argument
168 #define ARM_DRTM_DMA_PROT_FEATURES_SET_DMA_SUPPORT(reg, val) \ argument
177 #define ARM_DRTM_TCB_HASH_FEATURES_SET_MAX_NUM_HASHES(reg, val) \ argument
187 #define ARM_DRTM_DLME_IMG_AUTH_SUPPORT(reg, val) \ argument
216 #define ARM_DRTM_REGION_SIZE_TYPE_SET_CACHEABILITY(reg, val) \ argument
[all …]
/rk3399_ARM-atf/plat/hisilicon/hikey/
H A Dhisi_ipc.c40 unsigned int val = 0, cpu_val = 0; in hisi_cpus_pd_in_cluster_besides_curr() local
61 unsigned int val; in hisi_cpus_powered_off_besides_curr() local
100 unsigned int val = 0; in hisi_ipc_cpu_on_off() local
132 unsigned int val = 0; in hisi_ipc_cluster_on_off() local
163 unsigned int val = 0; in hisi_ipc_cpu_suspend() local
179 unsigned int val; in hisi_ipc_cluster_suspend() local
/rk3399_ARM-atf/plat/st/stm32mp2/include/
H A Dstm32mp2_private.h38 static inline uint32_t stm32_otp_read(uint32_t *val, uint32_t otp) in stm32_otp_read()
43 static inline uint32_t stm32_otp_shadow_read(uint32_t *val, uint32_t otp) in stm32_otp_shadow_read()
48 static inline uint32_t stm32_otp_write(uint32_t val, uint32_t otp) in stm32_otp_write()
/rk3399_ARM-atf/plat/st/stm32mp1/include/
H A Dstm32mp1_private.h37 static inline uint32_t stm32_otp_read(uint32_t *val, uint32_t otp) in stm32_otp_read()
42 static inline uint32_t stm32_otp_shadow_read(uint32_t *val, uint32_t otp) in stm32_otp_shadow_read()
47 static inline uint32_t stm32_otp_write(uint32_t val, uint32_t otp) in stm32_otp_write()
/rk3399_ARM-atf/plat/brcm/board/stingray/driver/
H A Dusb.c55 uint32_t val; in usb3h_usb2drd_init() local
108 uint32_t val; in usb3drd_init() local
230 uint32_t val; in xhci_phy_init() local
/rk3399_ARM-atf/plat/nvidia/tegra/soc/t194/drivers/se/
H A Dse.c55 uint32_t val = 0, timeout = 0, sha_status, aes_status; in tegra_se_is_operation_complete() local
101 uint32_t val = 0, timeout = 0; in tegra_se_is_ready() local
195 uint32_t val = 0U; in tegra_se_sha256_hash_operation_complete() local
232 uint32_t val = 0U; in tegra_se_start_normal_operation() local
275 uint32_t val, last_buf, i; in tegra_se_calculate_sha256_hash() local
387 uint32_t val = 0U, hash_offset = 0U, scratch_offset = 0U; in tegra_se_save_sha256_pmc_scratch() local
415 int32_t val = 0; in tegra_se_calculate_save_sha256() local
/rk3399_ARM-atf/lib/extensions/sys_reg_trace/aarch64/
H A Dsys_reg_trace.c19 uint64_t val = per_world_ctx->ctx_cptr_el3; in sys_reg_trace_enable_per_world() local
31 uint64_t val = per_world_ctx->ctx_cptr_el3; in sys_reg_trace_disable_per_world() local
/rk3399_ARM-atf/plat/nxp/common/soc_errata/
H A Derrata_a008850.c18 uint32_t val = mmio_read_32(cci_base + CTRL_OVERRIDE_REG); in erratum_a008850_early() local
30 uint32_t val = mmio_read_32(cci_base + CTRL_OVERRIDE_REG); in erratum_a008850_post() local
/rk3399_ARM-atf/plat/mediatek/common/lpm/
H A Dmt_lp_api.c11 int ret, val; in mt_audio_update() local
34 int ret, val; in mtk_usb_update() local

12345678910>>...16