History log of /rk3399_ARM-atf/plat/st/stm32mp1/include/stm32mp1_private.h (Results 1 – 25 of 33)
Revision Date Author Comments
# 4e9b4980 10-Jul-2024 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge "refactor(st): change suffix for SYSCFG functions" into integration


# 4b1826c8 16-Jan-2024 Maxime Méré <maxime.mere@foss.st.com>

refactor(st): change suffix for SYSCFG functions

This patch replaces the suffix "stm32mp1_" in the SYSCFG drivers
with "stm32mp_". By using a common suffix for function names, we can
avoid issues or

refactor(st): change suffix for SYSCFG functions

This patch replaces the suffix "stm32mp1_" in the SYSCFG drivers
with "stm32mp_". By using a common suffix for function names, we can
avoid issues or platform compilation flags when a driver
needs to access SYSCFG across different platforms.

Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: I24407852c085abd843ef4cdef235c022a5e57a85

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# e6a0994c 23-Jan-2024 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "st-bsec-otp" into integration

* changes:
feat(stm32mp2-fdts): add board ID OTP in STM32MP257F-EV1
feat(stm32mp2-fdts): add OTP nodes in STM32MP251 SoC DT file
fix(stm

Merge changes from topic "st-bsec-otp" into integration

* changes:
feat(stm32mp2-fdts): add board ID OTP in STM32MP257F-EV1
feat(stm32mp2-fdts): add OTP nodes in STM32MP251 SoC DT file
fix(stm32mp2): add missing include
feat(st): do not directly call BSEC functions in common code
feat(st): use stm32_get_otp_value_from_idx() in BL31
refactor(st): update test for closed chip
refactor(st-bsec): improve BSEC driver
refactor(st): use dashes for BSEC node names

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# 3007c728 19-Sep-2023 Yann Gautier <yann.gautier@foss.st.com>

feat(st): do not directly call BSEC functions in common code

When STM32MP2 boots on Cortex-M33, the Cortex-A35 do no more have access
to BSEC peripheral. New static inline stm32_otp_* wrappers are a

feat(st): do not directly call BSEC functions in common code

When STM32MP2 boots on Cortex-M33, the Cortex-A35 do no more have access
to BSEC peripheral. New static inline stm32_otp_* wrappers are added,
which just redirect to BSEC functions.

While at it remove a useless bsec.h include.

Change-Id: Ie0f917c02e48acf456634f455dae41805bf6adbf
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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# c2c3ca12 16-Jan-2023 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "refactor_st_common" into integration

* changes:
refactor(st): move board info in common code
refactor(st): move GIC code to common directory
refactor(st): move boot b

Merge changes from topic "refactor_st_common" into integration

* changes:
refactor(st): move board info in common code
refactor(st): move GIC code to common directory
refactor(st): move boot backup register management

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# c27d8c00 06-Aug-2019 Yann Gautier <yann.gautier@st.com>

refactor(st): move GIC code to common directory

The GIC v2 initialization code could be shared to other ST platforms.
The stm32mp1_gic.c file is then moved to common directory, and renamed
stm32mp_g

refactor(st): move GIC code to common directory

The GIC v2 initialization code could be shared to other ST platforms.
The stm32mp1_gic.c file is then moved to common directory, and renamed
stm32mp_gic.c.
The functions are also prefixed with stm32mp_gic.

Change-Id: I60820823b470217d3a95cc569f941c2cb923dfa9
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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# 5fab71a7 14-Nov-2022 Manish Pandey <manish.pandey2@arm.com>

Merge "refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE" into integration


# 981b9dcb 14-Nov-2022 Yann Gautier <yann.gautier@st.com>

refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE

The code managing legacy boot (without FIP) that was under
STM32MP_USE_STM32IMAGE flag is remove.

Change-Id: I04452453ed84567b0de39e900594a81526562

refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE

The code managing legacy boot (without FIP) that was under
STM32MP_USE_STM32IMAGE flag is remove.

Change-Id: I04452453ed84567b0de39e900594a81526562259
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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# 2ff6a49e 22-Mar-2022 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "stm32mp13" into integration

* changes:
feat(stm32mp1): select platform compilation either by flag or DT
feat(stm32mp1-fdts): add support for STM32MP13 DK board
feat(s

Merge changes from topic "stm32mp13" into integration

* changes:
feat(stm32mp1): select platform compilation either by flag or DT
feat(stm32mp1-fdts): add support for STM32MP13 DK board
feat(stm32mp1-fdts): add DDR support for STM32MP13
feat(stm32mp1-fdts): add st-io_policies node for STM32MP13
feat(stm32mp1): updates for STM32MP13 device tree compilation
feat(stm32mp1-fdts): add DT files for STM32MP13
feat(dt-bindings): add TZC400 bindings for STM32MP13
feat(stm32mp1): add "Boot mode" management for STM32MP13
feat(stm32mp1): manage HSLV on STM32MP13
feat(stm32mp1): add sdmmc compatible in platform define
feat(st-sdmmc2): allow compatible to be defined in platform code
feat(stm32mp1): update IO compensation on STM32MP13
feat(stm32mp1): call pmic_voltages_init() in platform init
feat(st-pmic): add pmic_voltages_init() function
feat(stm32mp1): update CFG0 OTP for STM32MP13
feat(stm32mp1): usb descriptor update for STM32MP13
feat(st-clock): add clock driver for STM32MP13
feat(dt-bindings): add bindings for STM32MP13
feat(stm32mp1): get CPU info from SYSCFG on STM32MP13
feat(stm32mp1): use only one filter for TZC400 on STM32MP13
feat(stm32mp1): add a second fixed regulator
feat(stm32mp1): adaptations for STM32MP13 image header
feat(stm32mp1): update boot API for header v2.0
feat(stm32mp1): update IP addresses for STM32MP13
feat(stm32mp1): add part numbers for STM32MP13
feat(stm32mp1): chip rev. Z is 0x1001 on STM32MP13
feat(stm32mp1): update BACKUP_BOOT_MODE for STM32MP13
feat(stm32mp1): stm32mp_is_single_core() for STM32MP13
feat(stm32mp1): remove unsupported features on STM32MP13
feat(stm32mp1): update memory mapping for STM32MP13
feat(stm32mp1): introduce new flag for STM32MP13
feat(st): update stm32image tool for header v2

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# 296ac801 03-Feb-2021 Nicolas Toromanoff <nicolas.toromanoff@st.com>

feat(stm32mp1): add "Boot mode" management for STM32MP13

Add new APIs to enter and exit "boot mode".

In this mode a potential tamper won't block access or reset
the secure IPs needed while boot, wi

feat(stm32mp1): add "Boot mode" management for STM32MP13

Add new APIs to enter and exit "boot mode".

In this mode a potential tamper won't block access or reset
the secure IPs needed while boot, without this mode a dead
lock may occurs.

Change-Id: Iad60d4a0420ec125b842a285f73a20eb54cd1828
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>

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# 6512c3a6 21-Apr-2020 Yann Gautier <yann.gautier@st.com>

feat(stm32mp1): get CPU info from SYSCFG on STM32MP13

The IDC register from DBGMCU is duplicated in SYSCFG. As SYSCFG is
always accessible, get chip ID and revision ID from there on STM32MP13.

Chan

feat(stm32mp1): get CPU info from SYSCFG on STM32MP13

The IDC register from DBGMCU is duplicated in SYSCFG. As SYSCFG is
always accessible, get chip ID and revision ID from there on STM32MP13.

Change-Id: Ib0b6e8f68a2934a45ec0012f69db6c12a60adb17
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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# 24dc0a28 24-Jan-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes from topic "st_syscfg_updates" into integration

* changes:
feat(stm32mp1): add helper to enable high speed mode in low voltage
refactor(stm32mp1): add helpers for IO compensation c

Merge changes from topic "st_syscfg_updates" into integration

* changes:
feat(stm32mp1): add helper to enable high speed mode in low voltage
refactor(stm32mp1): add helpers for IO compensation cells
feat(stm32mp1): use clk_enable/disable functions
feat(stm32mp1): add timeout in IO compensation

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# 1f4513cb 16-Dec-2020 Yann Gautier <yann.gautier@st.com>

refactor(stm32mp1): add helpers for IO compensation cells

Add enable_io_comp_cell and disable_io_comp_cell local helpers
to enable or disable an IO compensation cell.

Change-Id: I65295298a7ece572ae

refactor(stm32mp1): add helpers for IO compensation cells

Add enable_io_comp_cell and disable_io_comp_cell local helpers
to enable or disable an IO compensation cell.

Change-Id: I65295298a7ece572ae939e2db93d10b188de0f9e
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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# 4abb0db1 14-Dec-2021 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes from topic "st_uart_update" into integration

* changes:
feat(st): protect UART during platform init
feat(stm32mp1): update console management for SP_min
refactor(stm32mp1): impro

Merge changes from topic "st_uart_update" into integration

* changes:
feat(st): protect UART during platform init
feat(stm32mp1): update console management for SP_min
refactor(stm32mp1): improve console management in BL2
feat(plat/st): add a function to configure console
feat(stm32mp1): add stm32_get_boot_interface function
refactor(stm32mp1): move stm32_save_boot_interface()
fix(stm32mp1): deconfigure UART RX pins
feat(stm32_gpio): add a function to reset a pin
refactor(stm32mp1): sort compilation flags
feat(stm32mp1): add sign-compare warning

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# d7176f03 04-Jun-2021 Yann Gautier <yann.gautier@foss.st.com>

fix(stm32mp1): deconfigure UART RX pins

Those pins are configured by ROM code, for serial boot use cases.
Their configs are reset if the boot is done on UART, but not on USB.
This should then be don

fix(stm32mp1): deconfigure UART RX pins

Those pins are configured by ROM code, for serial boot use cases.
Their configs are reset if the boot is done on UART, but not on USB.
This should then be done in TF-A. This has to be done after clock
init, and before console is configured.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I29a9694e25fcf1665360dd71f73937f769c43b52

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# 2ed0c59b 09-Sep-2021 Mark Dykes <mark.dykes@arm.com>

Merge "feat(plat/st): add a new DDR firewall management" into integration


# 4584e01d 27-Sep-2020 Lionel Debieve <lionel.debieve@st.com>

feat(plat/st): add a new DDR firewall management

Based on FCONF framework, define DDR firewall regions
from firmware config file instead of static defines.

Change-Id: I471e15410ca286d9079a86e3dc347

feat(plat/st): add a new DDR firewall management

Based on FCONF framework, define DDR firewall regions
from firmware config file instead of static defines.

Change-Id: I471e15410ca286d9079a86e3dc3474f66d37b5ab
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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# 43f7d887 22-Jul-2020 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "stm32-scmi" into integration

* changes:
stm32mp1: SCMI clock and reset service in SP_MIN
dts: bindings: stm32mp1: define SCMI clock and reset domain IDs


# fdaaaeb4 16-Jul-2020 Etienne Carriere <etienne.carriere@st.com>

stm32mp1: SCMI clock and reset service in SP_MIN

This change implements platform services for stm32mp1 to expose clock
and reset controllers over SCMI clock and reset domain protocols
in sp_min firm

stm32mp1: SCMI clock and reset service in SP_MIN

This change implements platform services for stm32mp1 to expose clock
and reset controllers over SCMI clock and reset domain protocols
in sp_min firmware.

Requests execution use a fastcall SMC context using a SiP function ID.
The setup allows the create SCMI channels by assigning a specific
SiP SMC function ID for each channel/agent identifier defined. In this
change, stm32mp1 exposes a single channel and hence expects single
agent at a time.

The input payload in copied in secure memory before the message
in passed through the SCMI server drivers. BL32/sp_min is invoked
for a single SCMI message processing and always returns with a
synchronous response message passed back to the caller agent.

This change fixes and updates STM32_COMMON_SIP_NUM_CALLS that was
previously wrongly set 4 whereas only 1 SiP SMC function ID was to
be counted. STM32_COMMON_SIP_NUM_CALLS is now set to 3 since the
2 added SiP SMC function IDs for SCMI services.

Change-Id: Icb428775856b9aec00538172aea4cf11e609b033
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

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# de8f9cd4 30-Mar-2020 Olivier Deprez <olivier.deprez@arm.com>

Merge changes from topic "ddr_map" into integration

* changes:
stm32mp1: use stm32mp_get_ddr_ns_size() function
stm32mp1: set XN attribute for some areas in BL2
stm32mp1: dynamically map DDR l

Merge changes from topic "ddr_map" into integration

* changes:
stm32mp1: use stm32mp_get_ddr_ns_size() function
stm32mp1: set XN attribute for some areas in BL2
stm32mp1: dynamically map DDR later and non-cacheable during its test
stm32mp1: add a function to get non-secure DDR size

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# e6cc3ccf 26-Feb-2020 Yann Gautier <yann.gautier@st.com>

stm32mp1: add a function to get non-secure DDR size

This function gets the DDR size from DT, and withdraws (if defined) the
sizes of secure DDR and shared memory areas.
This function also checks DT

stm32mp1: add a function to get non-secure DDR size

This function gets the DDR size from DT, and withdraws (if defined) the
sizes of secure DDR and shared memory areas.
This function also checks DT values fits the default DDR range.
This non-secure memory is available for BL33 and non-secure OS.

Change-Id: I162ae5e990a0f9b6b7d07e539de029f1d61a391b
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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# fc3c382f 19-Jun-2019 John Tsichritzis <john.tsichritzis@arm.com>

Merge changes from topic "yg/clk_syscfg_dt" into integration

* changes:
fdts: stm32mp1: realign device tree files with internal devs
stm32mp1: increase device tree size to 20kB
stm32mp1: make

Merge changes from topic "yg/clk_syscfg_dt" into integration

* changes:
fdts: stm32mp1: realign device tree files with internal devs
stm32mp1: increase device tree size to 20kB
stm32mp1: make dt_get_stdout_node_offset() static
stm32mp1: use unsigned values for SDMMC defines
stm32mp1: remove useless LIBFDT_SRCS from PLAT_BL_COMMON_SOURCES
stm32mp1: update doc for U-Boot compilation
stm32mp1: add general SYSCFG management
stm32mp1: move stm32_get_gpio_bank_clock() to private file
clk: stm32mp1: correctly handle Clock Spreading Generator
clk: stm32mp1: use defines for mask values in stm32mp1_clk_sel array
clk: stm32mp1: move oscillator functions to generic file
arch: add some defines for generic timer registers

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# f33b2433 20-May-2019 Yann Gautier <yann.gautier@st.com>

stm32mp1: add general SYSCFG management

The system configuration controller is mainly used to manage
the compensation cell and other IOs and system related settings.

The SYSCFG driver is in charge

stm32mp1: add general SYSCFG management

The system configuration controller is mainly used to manage
the compensation cell and other IOs and system related settings.

The SYSCFG driver is in charge of configuring masters on the interconnect,
IO compensation, low voltage boards, or pull-ups for boot pins.
All other configurations should be handled in Linux drivers requiring it.

Device tree files are also updated to manage vdd-supply regulator.

Change-Id: I10fb513761a7d1f2b7afedca9c723ad9d1bccf42
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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# 37cdad2a 18-Feb-2019 Antonio Niño Díaz <antonio.ninodiaz@arm.com>

Merge pull request #1821 from Yann-lms/stm32mp1_2019-02-14

Series of new patches for STM32MP1


# c9d75b3c 14-Feb-2019 Yann Gautier <yann.gautier@st.com>

stm32mp1: split code between common and private parts

Some parts of code could be shared with platform derivatives,
or new platforms.
A new folder plat/st/common is created to put common parts.

stm

stm32mp1: split code between common and private parts

Some parts of code could be shared with platform derivatives,
or new platforms.
A new folder plat/st/common is created to put common parts.

stm32mp_common.h is a common API aggregate.

Remove some casts where applicable.
Fix some types where applicable.
Remove also some platform includes that are already in stm32mp1_def.h.

Change-Id: I46d763c8d9e15732d1ee7383207fd58206d7f583
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

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