| /rk3399_ARM-atf/drivers/st/bsec/ |
| H A D | bsec2.c | 318 uint32_t bsec_read_otp(uint32_t *val, uint32_t otp) in bsec_read_otp()
340 uint32_t bsec_write_otp(uint32_t val, uint32_t otp) in bsec_write_otp()
378 uint32_t bsec_program_otp(uint32_t val, uint32_t otp) in bsec_program_otp()
530 void bsec_write_scratch(uint32_t val) in bsec_write_scratch()
785 uint32_t bsec_shadow_read_otp(uint32_t *val, uint32_t otp) in bsec_shadow_read_otp()
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| /rk3399_ARM-atf/drivers/nxp/sd/ |
| H A D | sd_mmc.c | 102 uint32_t val; in esdhc_init() local
185 uint32_t val; in esdhc_send_cmd() local
281 uint32_t val; in esdhc_wait_response() local
413 uint32_t val; in esdhc_set_data_attributes() local
478 uint32_t val; in esdhc_read_data_nodma() local
552 uint32_t val; in esdhc_write_data_nodma() local
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| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t194/drivers/mce/ |
| H A D | nvg.c | 64 uint64_t val = 0; in nvg_update_cstate_info() local
182 uint64_t val = 0ULL; in nvg_enter_cstate() local
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| /rk3399_ARM-atf/plat/imx/imx8m/include/ |
| H A D | imx8m_csu.h | 66 #define CSU_HPx(i, val, lk) \ argument
69 #define CSU_SA(i, val, lk) \ argument
72 #define CSU_HPCTRL(i, val, lk) \ argument
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| /rk3399_ARM-atf/plat/arm/board/morello/ |
| H A D | morello_bl2_setup.c | 29 uint32_t val; in dmc_ecc_setup() local
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| /rk3399_ARM-atf/plat/mediatek/drivers/spm/version/notifier/inc/ |
| H A D | mt_spm_notifier.h | 19 static inline int mt_spm_sspm_notify_u32(int type, unsigned int val) in mt_spm_sspm_notify_u32()
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| /rk3399_ARM-atf/drivers/arm/gic/common/ |
| H A D | gic_common_private.h | 33 static inline void gicd_write_ctlr(uintptr_t base, unsigned int val) in gicd_write_ctlr()
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| /rk3399_ARM-atf/plat/intel/soc/agilex/soc/ |
| H A D | agilex_pinmux.c | 191 uint32_t val; in config_fpgaintf_mod() local
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| /rk3399_ARM-atf/lib/libfdt/ |
| H A D | fdt_strerror.c | 18 #define FDT_ERRTABENT(val) \ argument
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| /rk3399_ARM-atf/plat/imx/common/ |
| H A D | imx_clock.c | 16 void imx_clock_target_set(unsigned int id, uint32_t val) in imx_clock_target_set()
28 void imx_clock_target_clr(unsigned int id, uint32_t val) in imx_clock_target_clr()
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| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/constraints/ |
| H A D | mt_spm_rc_syspll.c | 47 #define CHECK_VAL(val, sys_state) \ argument
82 int spm_update_rc_syspll(int state_id, int type, const void *val) in spm_update_rc_syspll()
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| /rk3399_ARM-atf/drivers/marvell/secure_dfx_access/ |
| H A D | misc_dfx.c | 93 static int armada_dfx_swrite(u_register_t addr, u_register_t val) in armada_dfx_swrite()
104 u_register_t addr, u_register_t val) in mvebu_dfx_misc_handle()
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| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/constraints/ |
| H A D | mt_spm_rc_syspll.c | 46 #define CHECK_VAL(val, sys_state) \ argument
80 int spm_update_rc_syspll(int state_id, int type, const void *val) in spm_update_rc_syspll()
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| /rk3399_ARM-atf/plat/brcm/board/stingray/src/ |
| H A D | bl31_setup.c | 79 unsigned int val; in brcm_stingray_dma_pl330_init() local
313 unsigned int val; in brcm_stingray_amac_init() local
393 unsigned int val; in brcm_stingray_smmu_init() local
493 unsigned int val; in brcm_stingray_scr_init() local
535 unsigned int val; in brcm_stingray_hsls_tzpcprot_init() local
586 unsigned int val; in brcm_stingray_audio_init() local
697 unsigned int val; in brcm_stingray_security_init() local
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| H A D | bl2_setup.c | 103 unsigned int val; in brcm_stingray_nand_init() local
497 uint8_t val; in gpio_get_state() local
544 unsigned int i, val; in board_detect_gpio() local
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| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/ |
| H A D | plat_psci_handlers.c | 109 uint32_t val; in tegra_soc_pwr_domain_suspend() local
286 uint64_t val; in tegra_soc_pwr_domain_power_down_wfi() local
375 uint64_t impl, val; in tegra_soc_pwr_domain_on_finish() local
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| /rk3399_ARM-atf/plat/mediatek/drivers/spm/version/notifier/v1/ |
| H A D | mt_spm_sspm_notifier.c | 24 int mt_spm_sspm_notify_u32(int type, unsigned int val) in mt_spm_sspm_notify_u32()
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| /rk3399_ARM-atf/drivers/marvell/mc_trustzone/ |
| H A D | mc_trustzone.c | 35 uint32_t val, base = win->base_addr; in tz_enable_win() local
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| /rk3399_ARM-atf/plat/rockchip/rk3328/drivers/soc/ |
| H A D | soc.c | 101 uint32_t i, val; in sgrf_init() local
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| /rk3399_ARM-atf/plat/amlogic/common/ |
| H A D | aml_mhu.c | 31 uint32_t val; in aml_mhu_secure_message_wait() local
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| /rk3399_ARM-atf/plat/qti/msm8916/ |
| H A D | msm8916_config.c | 135 #define SMMU_IDR7_MINOR(val) (((val) >> 0) & 0xf) argument
136 #define SMMU_IDR7_MAJOR(val) (((val) >> 4) & 0xf) argument
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| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t194/ |
| H A D | plat_setup.c | 372 uint64_t val; in plat_get_bl31_params() local
387 uint64_t val; in plat_get_bl31_plat_params() local
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| /rk3399_ARM-atf/drivers/arm/gicv5/ |
| H A D | gicv5_main.c | 51 uint32_t val = read_iwb_wdomainr(base_addr, reg_index) & in iwb_configure_domainr() local
61 uint32_t val = read_iwb_wtmr(base_addr, reg_index) & ~(1U << reg_offset); in iwb_configure_wtmr() local
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| /rk3399_ARM-atf/plat/brcm/board/stingray/driver/ext_sram_init/ |
| H A D | ext_sram_init.c | 181 unsigned int val, tmp; in brcm_stingray_pnor_sram_init() local
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| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t210/ |
| H A D | plat_sip_calls.c | 50 uint32_t val, ns; in plat_sip_handler() local
|