Home
last modified time | relevance | path

Searched defs:fifo_ctrl (Results 1 – 7 of 7) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/net/
H A Dxilinx_ll_temac_fifo.h43 struct fifo_ctrl { struct
44 u32 isr; /* Interrupt Status Register (RW) */
45 u32 ier; /* Interrupt Enable Register (RW) */
46 u32 tdfr; /* Transmit Data FIFO Reset (WO) */
47 u32 tdfv; /* Transmit Data FIFO Vacancy (RO) */
48 u32 tdfd; /* Transmit Data FIFO 32bit wide Data write port (WO) */
49 u32 tlf; /* Transmit Length FIFO (WO) */
50 u32 rdfr; /* Receive Data FIFO Reset (WO) */
51 u32 rdfo; /* Receive Data FIFO Occupancy (RO) */
52 u32 rdfd; /* Receive Data FIFO 32bit wide Data read port (RO) */
[all …]
H A Dxilinx_ll_temac_fifo.c38 struct fifo_ctrl *fifo_ctrl = (void *)ll_temac->ctrladdr; in ll_temac_reset_fifo() local
53 struct fifo_ctrl *fifo_ctrl = (void *)ll_temac->ctrladdr; in ll_temac_recv_fifo() local
107 struct fifo_ctrl *fifo_ctrl = (void *)ll_temac->ctrladdr; in ll_temac_send_fifo() local
/OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/
H A Ddib3000.h35 int (*fifo_ctrl)(struct dvb_frontend *fe, int onoff); member
/OK3568_Linux_fs/kernel/arch/powerpc/include/asm/
H A Dmpc5121.h77 u32 fifo_ctrl; /* LPC RX/TX FIFO Control Register */ member
/OK3568_Linux_fs/u-boot/drivers/mtd/nand/raw/
H A Dtegra_nand.h229 u32 fifo_ctrl; /* offset 3Ch */ member
/OK3568_Linux_fs/kernel/drivers/dma/
H A Dtegra210-adma.c111 unsigned int fifo_ctrl; member
/OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/
H A Devergreen.c2628 unsigned fifo_ctrl; in evergreen_blank_dp_output() local