Searched defs:divn (Results 1 – 6 of 6) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/mach-uniphier/clk/ |
| H A D | pll-base-ld20.c | 32 unsigned int ssc_rate, unsigned int divn) in uniphier_ld20_sscpll_init()
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| /rk3399_rockchip-uboot/arch/arm/mach-tegra/ |
| H A D | cpu.c | 171 int pllx_set_rate(struct clk_pll_simple *pll , u32 divn, u32 divm, in pllx_set_rate()
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| H A D | clock.c | 90 int clock_ll_read_pll(enum clock_id clkid, u32 *divm, u32 *divn, in clock_ll_read_pll()
114 unsigned long clock_start_pll(enum clock_id clkid, u32 divm, u32 divn, in clock_start_pll()
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra/ |
| H A D | warmboot.h | 74 u32 divn:10; member
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| /rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra20/ |
| H A D | warmboot.c | 154 u32 divm, divn, divp, cpcon, lfcon; in warmboot_save_sdram_params() local
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| /rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra124/ |
| H A D | clock.c | 1067 u32 divm, divn, divp, cpcon; in clock_set_display_rate() local
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