| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/constraints/ |
| H A D | mt_spm_trace.h | 69 #define MT_SPM_TRACE_COMMON_U32_WR(_type, _val) \ argument
83 #define MT_SPM_TRACE_COMMON_U32_RD(_type, _val) \ argument
90 #define MT_SPM_TRACE_COMMON_RD(_type, _val) \ argument
97 #define MT_SPM_TRACE_SUSPEND_U32_WR(_type, _val) \ argument
104 #define MT_SPM_TRACE_SUSPEND_WR(_type, _val, _sz) \ argument
111 #define MT_SPM_TRACE_SUSPEND_U32_RD(_type, _val) \ argument
118 #define MT_SPM_TRACE_SUSPEND_RD(_type, _val) \ argument
125 #define MT_SPM_TRACE_LP_U32_WR(_type, _val) \ argument
132 #define MT_SPM_TRACE_LP_WR(_type, _val, _sz) \ argument
138 #define MT_SPM_TRACE_LP_U32_RD(_type, _val) \ argument
[all …]
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| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/constraints/ |
| H A D | mt_spm_trace.h | 69 #define MT_SPM_TRACE_COMMON_U32_WR(_type, _val) ({ \ argument
77 #define MT_SPM_TRACE_COMMON_U32_RD(_type, _val) ({ \ argument
81 #define MT_SPM_TRACE_COMMON_RD(_type, _val) ({ \ argument
86 #define MT_SPM_TRACE_SUSPEND_U32_WR(_type, _val) ({ \ argument
90 #define MT_SPM_TRACE_SUSPEND_WR(_type, _val, _sz) ({ \ argument
94 #define MT_SPM_TRACE_SUSPEND_U32_RD(_type, _val) ({\ argument
98 #define MT_SPM_TRACE_SUSPEND_RD(_type, _val) ({ \ argument
103 #define MT_SPM_TRACE_LP_U32_WR(_type, _val) ({ \ argument
107 #define MT_SPM_TRACE_LP_WR(_type, _val, _sz) ({ \ argument
111 #define MT_SPM_TRACE_LP_U32_RD(_type, _val) ({ \ argument
[all …]
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| /rk3399_ARM-atf/include/arch/aarch32/ |
| H A D | asm_macros.S | 144 mov_imm_reg _val global() argument
190 orr64_imm_reg_l _reg_h _val global() argument
208 bic64_imm_reg_l _reg_h _val global() argument
[all...] |
| /rk3399_ARM-atf/plat/arm/board/juno/aarch64/ |
| H A D | juno_helpers.S | 228 .macro emit_movw _reg_d, _val
238 .macro emit_movt _reg_d, _val
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| /rk3399_ARM-atf/include/arch/aarch64/ |
| H A D | asm_macros.S | 186 .macro mov_imm _reg, _val
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| /rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv5_4/ |
| H A D | mt_cpu_pm.h | 63 #define PER_CLUSTER_PWR_CTRL(_val, _cl) ({ \ argument
81 #define PER_CPU_PWR_CTRL(_val, _cpu) ({ \ argument
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| /rk3399_ARM-atf/plat/intel/soc/common/drivers/ccu/ |
| H A D | ncore_ccu.c | 35 #define FIELD_PREP(_mask, _val) \ argument
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| /rk3399_ARM-atf/plat/intel/soc/agilex5/include/ |
| H A D | agilex5_iossm_mailbox.h | 23 #define FIELD_PREP(_mask, _val) \ argument
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| /rk3399_ARM-atf/include/drivers/cadence/ |
| H A D | cdns_nand.h | 20 #define FIELD_PREP(_mask, _val) \ argument
|