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Searched defs:CKG_IDCLK2_GATED (Results 1 – 25 of 31) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/pws/hal/maldives/pws/
H A DregCLKGEN.h447 #define CKG_IDCLK2_GATED BIT0 macro
/utopia/UTPA2-700.0.x/modules/pws/hal/k6/pws/
H A DregCLKGEN.h447 #define CKG_IDCLK2_GATED BIT0 macro
/utopia/UTPA2-700.0.x/modules/pws/hal/macan/pws/
H A DregCLKGEN.h447 #define CKG_IDCLK2_GATED BIT0 macro
/utopia/UTPA2-700.0.x/modules/pws/hal/mooney/pws/
H A DregCLKGEN.h447 #define CKG_IDCLK2_GATED BIT0 macro
/utopia/UTPA2-700.0.x/modules/pws/hal/messi/pws/
H A DregCLKGEN.h447 #define CKG_IDCLK2_GATED BIT0 macro
/utopia/UTPA2-700.0.x/modules/pws/hal/manhattan/pws/
H A DregCLKGEN.h447 #define CKG_IDCLK2_GATED BIT0 macro
/utopia/UTPA2-700.0.x/modules/pws/hal/k6lite/pws/
H A DregCLKGEN.h447 #define CKG_IDCLK2_GATED BIT0 macro
/utopia/UTPA2-700.0.x/modules/pws/hal/M7821/pws/
H A DregCLKGEN.h447 #define CKG_IDCLK2_GATED BIT0 macro
/utopia/UTPA2-700.0.x/modules/pws/hal/mainz/pws/
H A DregCLKGEN.h447 #define CKG_IDCLK2_GATED BIT0 macro
/utopia/UTPA2-700.0.x/modules/pws/hal/mustang/pws/
H A DregCLKGEN.h447 #define CKG_IDCLK2_GATED BIT0 macro
/utopia/UTPA2-700.0.x/modules/pws/hal/maxim/pws/
H A DregCLKGEN.h447 #define CKG_IDCLK2_GATED BIT0 macro
/utopia/UTPA2-700.0.x/modules/pws/hal/M7621/pws/
H A DregCLKGEN.h447 #define CKG_IDCLK2_GATED BIT0 macro
/utopia/UTPA2-700.0.x/modules/pws/hal/curry/pws/
H A DregCLKGEN.h447 #define CKG_IDCLK2_GATED BIT0 macro
/utopia/UTPA2-700.0.x/modules/pws/hal/kano/pws/
H A DregCLKGEN.h447 #define CKG_IDCLK2_GATED BIT0 macro
/utopia/UTPA2-700.0.x/modules/pws/hal/maserati/pws/
H A DregCLKGEN.h447 #define CKG_IDCLK2_GATED BIT0 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dmhal_xc_chip_config.h569 #define CKG_IDCLK2_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dmhal_xc_chip_config.h569 #define CKG_IDCLK2_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dmhal_xc_chip_config.h748 #define CKG_IDCLK2_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_xc_chip_config.h716 #define CKG_IDCLK2_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dmhal_xc_chip_config.h754 #define CKG_IDCLK2_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_xc_chip_config.h718 #define CKG_IDCLK2_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dmhal_xc_chip_config.h765 #define CKG_IDCLK2_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dmhal_xc_chip_config.h759 #define CKG_IDCLK2_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_xc_chip_config.h719 #define CKG_IDCLK2_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_xc_chip_config.h779 #define CKG_IDCLK2_GATED BIT(0) macro

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