xref: /rk3399_rockchip-uboot/include/zynqmppl.h (revision 6b2450143882987f4287ea78783866c5f9ac4aff)
1 /*
2  * (C) Copyright 2015 Xilinx, Inc,
3  * Michal Simek <michal.simek@xilinx.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0
6  */
7 
8 #ifndef _ZYNQMPPL_H_
9 #define _ZYNQMPPL_H_
10 
11 #include <xilinx.h>
12 
13 #define ZYNQMP_SIP_SVC_PM_FPGA_LOAD		0xC2000016
14 #define ZYNQMP_FPGA_OP_INIT			(1 << 0)
15 #define ZYNQMP_FPGA_OP_LOAD			(1 << 1)
16 #define ZYNQMP_FPGA_OP_DONE			(1 << 2)
17 
18 extern struct xilinx_fpga_op zynqmp_op;
19 
20 #define XILINX_ZYNQMP_DESC \
21 { xilinx_zynqmp, csu_dma, 1, &zynqmp_op, 0, &zynqmp_op }
22 
23 #endif /* _ZYNQMPPL_H_ */
24