mtd: spinand: Kingston: Support new device SPI004-SDEG

Change-Id: Idf004dbac168564e568aa2593981368e84304ae7
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: HIKSEMI: Support new device HSESYHDSW2G

Change-Id: Ibde2a00a3563564722400a92f8e772314d026024
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support for spinand continouse read

Change-Id: Ie74444587378f076fdb0e08eeacd1dab3c3f25f2
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: zbit: Add code

Support ZB35Q01BYIG.

Change-Id: Ia468142ed8189ada1b43310bd768a84503ad7a59
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: unim: Support new devices

UM19A0HISW, UM19A0LISW, UM19A1HISW, UM19A1lISW

Change-Id: I76524e8a8c4325dfe97d1a57b24d611c263b6d8d
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Enable HWP_EN for skyhigh devices

HWP_EN must be enabled first before block unlock region is set.

Change-Id: Ifd473a85b45d1a24f4af08cb127c8b1b5f8fcb34
Signed-off-by: Jon Lin <jon.lin@

mtd: spinand: Enable HWP_EN for skyhigh devices

HWP_EN must be enabled first before block unlock region is set.

Change-Id: Ifd473a85b45d1a24f4af08cb127c8b1b5f8fcb34
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

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mtd: spinand: Support XINCUN devices

XCSP2AAPK

Change-Id: I594541de8d6aa2adfed31472f7066d26683ce3b6
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support gsto devices

GSS01GSAK1, GSS02GSAK1

Change-Id: I112c38093ea5536f6fe54b2e8ccc97316257556f
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support new device

S35ML04G3

Change-Id: If7e138c68c570257dc1632ab6d5b54ee0f3ea9a0
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

UPSTREAM: mtd: spinand: Define macros for page-read ops with three-byte addresses

The GigaDevice GD5F1GQ4UFxxG SPI NAND utilizes three-byte addresses
for its page-read ops.

http://www.gigadevice.co

UPSTREAM: mtd: spinand: Define macros for page-read ops with three-byte addresses

The GigaDevice GD5F1GQ4UFxxG SPI NAND utilizes three-byte addresses
for its page-read ops.

http://www.gigadevice.com/datasheet/gd5f1gq4xfxxg/
Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

Change-Id: Ica4e6307a8bcb55ba544837f525ddf85e6bbf0a4
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from linux for-next branch commit bded033062396e67ffbb3111084cf7ea202473d5)

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mtd: spinand: rework detect procedure for different READ_ID operation

Currently there are 3 different variants of read_id implementation:
1. opcode only. Found in GD5FxGQ4xF.
2. opcode + 1 addr byte

mtd: spinand: rework detect procedure for different READ_ID operation

Currently there are 3 different variants of read_id implementation:
1. opcode only. Found in GD5FxGQ4xF.
2. opcode + 1 addr byte. Found in GD5GxGQ4xA/E
3. opcode + 1 dummy byte. Found in other currently supported chips.

Original implementation was for variant 1 and let detect function
of chips with variant 2 and 3 to ignore the first byte. This isn't
robust:

1. For chips of variant 2, if SPI master doesn't keep MOSI low
during read, chip will get a random id offset, and the entire id
buffer will shift by that offset, causing detect failure.

2. For chips of variant 1, if it happens to get a devid that equals
to manufacture id of variant 2 or 3 chips, it'll get incorrectly
detected.

This patch reworks detect procedure to address problems above. New
logic do detection for all variants separatedly, in 1-2-3 order.
Since all current detect methods do exactly the same id matching
procedure, unify them into core.c and remove detect method from
manufacture_ops.

Link: https://lore.kernel.org/linux-mtd/20200208074439.146296-1-gch981213@gmail.com

Change-Id: Ib06417c8e8c7e9d58be1eb3549468bfcbd74350d
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

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mtd: spinand: Support new device

TX25G01

Change-Id: Ife04db759dc9b5db905b50b64ba947828342496d
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support new device

SGM7000I-S24W1GH

Change-Id: Id41d22e8c5b8e92afcd80d564ddb4a8ea2ff61c5
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support new device

js28u1gqscahg-83

Change-Id: I45a1d60b01ac52f72ba5d8fc75242dfc6c402d3a
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support Etron devices

Support EM73C044VCF-OH

Change-Id: I1195c15d3260c309076e55d65f6964bd43b6b1e4
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support BWJX08K

Change-Id: Iddcc569cb4865bc73d0829fd5e6a33c7c85632b5
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Add foresee devices

Change-Id: I115ea19030edc2e83e877621f055555b481f98db
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support FM25S01A

Change-Id: I805cbf0e8bc47cd9bd94fd296dbaf46921490f15
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support hyf devices

Support HYF1GQ4UPACAE, HYF1GQ4UDACAE

Change-Id: I9b8022d9320150d587b443cfa4cdc7495267795e
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support xtx devices

Support XT26G01A, XT26G02A, XT26G04A, XT26G01B, XT26G02B

Change-Id: I447d83e5c5da8f6ba8515aab77a8039fe9cb2cc4
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support esmt devices

Support F50L1G41LB

Change-Id: I094a093fd07b6b2f924a58cf45375e214df796ce
Signed-off-by: Carl <xjxia@grandstream.cn>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support dosilicon devcies

Support DS35X1GA

Change-Id: Iadbda15075e54325bf5c2dffa28d560947cec627
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

UPSTREAM: mtd: spi-nand: Import Toshiba SPI-NAND support

Linux has good support for Toshiba SPI-NAND, so lets import it.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Tested-by: Luka Kovaci

UPSTREAM: mtd: spi-nand: Import Toshiba SPI-NAND support

Linux has good support for Toshiba SPI-NAND, so lets import it.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Tested-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Change-Id: I70a328bf28c7e8740d818958faf749016dd9ca77
(cherry picked from commit 89127104848cea38bac5d40e3d6973fc203e2df6)

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UPSTREAM: mtd: nand: spi: Add Gigadevice SPI NAND support

This patch adds support for Gigadevices SPI NAND device to the new SPI
NAND infrastructure in U-Boot. Currently only the 128MiB GD5F1GQ4UC
d

UPSTREAM: mtd: nand: spi: Add Gigadevice SPI NAND support

This patch adds support for Gigadevices SPI NAND device to the new SPI
NAND infrastructure in U-Boot. Currently only the 128MiB GD5F1GQ4UC
device is supported.

Change-Id: I9939a71a038b27bb7250dec0617a0d11e18f03dd
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Boris Brezillon <boris.brezillon@bootlin.com>
Cc: Jagan Teki <jagan@openedev.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 9e5c2a755a6ca5f3931de548f43101d0d18ac003)

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UPSTREAM: mtd: spinand: Add initial support for the MX35LF1GE4AB chip

Add minimal support for the MX35LF1GE4AB SPI NAND chip.

Change-Id: Ifb036b16f09086f5cda092c30bb850d1f91668a4
Signed-off-by: Bor

UPSTREAM: mtd: spinand: Add initial support for the MX35LF1GE4AB chip

Add minimal support for the MX35LF1GE4AB SPI NAND chip.

Change-Id: Ifb036b16f09086f5cda092c30bb850d1f91668a4
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 6f041ccabb03bea16c2f21f3254dc9c1cb38425c)

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