mtd: spi: Support auto merge

In order to enable dual NOR flash users to experience double the
capacity and avoid frequent switching between two NOR flash devices,
the two NOR flash devices are virtu

mtd: spi: Support auto merge

In order to enable dual NOR flash users to experience double the
capacity and avoid frequent switching between two NOR flash devices,
the two NOR flash devices are virtualized into one device, which
I name it auto_merge tech.

Change-Id: I5edd7cde0481b1de6a35fce7ac67068889ff5ffe
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

show more ...

mtd: spi-nor-ids: support NM25Q128EVB

Change-Id: Ic77028b0e2a30d1b6791d667e57da25e7a15b3f5
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

UPSTREAM: mtd: spi-nor-core: Add octal mode support

Add support for Octal flash devices. Octal flash devices use 8 IO lines
for data transfer. Currently only 1-1-8 Octal Read mode is supported.

Sig

UPSTREAM: mtd: spi-nor-core: Add octal mode support

Add support for Octal flash devices. Octal flash devices use 8 IO lines
for data transfer. Currently only 1-1-8 Octal Read mode is supported.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
(cherry picked from commit 658df8bd946493e7fa7b0048a3a9bd658a1f4518)
Change-Id: I1fabb494a963ceccb873c8a04fc3241eddd65069
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

show more ...

UPSTREAM: mtd: spi-nor: add missing SST26* flash IC protection ops

Commit c4e8862308d4 (mtd: spi: Switch to new SPI NOR framework)
performs switch from previous 'spi_flash' infrastructure without
pr

UPSTREAM: mtd: spi-nor: add missing SST26* flash IC protection ops

Commit c4e8862308d4 (mtd: spi: Switch to new SPI NOR framework)
performs switch from previous 'spi_flash' infrastructure without
proper testing/investigations which results in a regressions for
SST26 flash series.

Add missing SST26* flash IC protection ops which were introduced
previously by
Commit 3d4fed87a5fa (mtd: sf: Add support of sst26wf* flash ICs
protection ops)

Change-Id: I4944e5680fb58c0a2fd2f38a6477acab24536928
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit e0cacdcc0a479dc70d3048ee40705478dce2655e)

show more ...

UPSTREAM: mtd: spi: spi-nor-core: Add back U-Boot specific features

For legacy reasons, we will have to keep around U-Boot specific
SPI_FLASH_BAR and SPI_TX_BYTE. Add them back to the new framework

UPSTREAM: mtd: spi: spi-nor-core: Add back U-Boot specific features

For legacy reasons, we will have to keep around U-Boot specific
SPI_FLASH_BAR and SPI_TX_BYTE. Add them back to the new framework

Change-Id: I6888e49eeaeb89adca64cb8ca6683b27781bd7a8
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 8c927809ea960596345c33b02294af6e236d4ad4)

show more ...

UPSTREAM: mtd: spi: Port SPI NOR framework from Linux

Current U-Boot SPI NOR support (sf layer) is quite outdated as it does not
support 4 byte addressing opcodes, SFDP table parsing and different t

UPSTREAM: mtd: spi: Port SPI NOR framework from Linux

Current U-Boot SPI NOR support (sf layer) is quite outdated as it does not
support 4 byte addressing opcodes, SFDP table parsing and different types of
quad mode enable sequences. Many newer flashes no longer support BANK
registers used by sf layer to a access >16MB of flash address space.
So, sync SPI NOR framework from Linux v4.19 that supports all the
above features. Start with basic sync up that brings in basic framework
subsequent commits will bring in more features.

Change-Id: I16b35b48166c00b7a4be215cfb6dcde00805f9f8
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 7aeedac01534ab343c28abed60f8e0fb9311bbee)

show more ...