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b0cf7339 |
| 27-Jan-2017 |
Patrick Delaunay <patrick.delaunay@st.com> |
disk: convert CONFIG_DOS_PARTITION to Kconfig
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
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a5d67547 |
| 23-Jan-2017 |
Simon Glass <sjg@chromium.org> |
Convert CONFIG_BOARD_EARLY_INIT_F to Kconfig
This converts the following to Kconfig: CONFIG_BOARD_EARLY_INIT_F
Signed-off-by: Simon Glass <sjg@chromium.org>
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a421192f |
| 23-Jan-2017 |
Simon Glass <sjg@chromium.org> |
Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig
This converts the following to Kconfig: CONFIG_ARCH_EARLY_INIT_R
Signed-off-by: Simon Glass <sjg@chromium.org>
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3788b451 |
| 21-Jan-2017 |
Jagan Teki <jagan@openedev.com> |
config: Move CONFIG_BOARD_LATE_INIT to defconfigs
Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
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0675f992 |
| 19-Jan-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq
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904110c7 |
| 10-Jan-2017 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
armv8/fsl-lsch2: refactor the clock system initialization
Up to now, there are 3 kind of SoCs under Layerscape Chassis 2, like LS1043A, LS1046A and LS1012A. But the clocks tree has a lot of differen
armv8/fsl-lsch2: refactor the clock system initialization
Up to now, there are 3 kind of SoCs under Layerscape Chassis 2, like LS1043A, LS1046A and LS1012A. But the clocks tree has a lot of differences, for instance, the IP modules have different dividers to derive its clock from Platform PLL. And the core cluster PLL and platform PLL maybe have different reference clocks, such as LS1012A. Another problem is which clock/PLL should be described by sys_info->freq_systembus, it is confused in Layerscape Chissis 2.
This patch is to bind the sys_info->freq_systembus to the Platform PLL, and handle the different divider of IP modules separately between different SoCs, and separate reference clocks of core cluster PLL and platform PLL.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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c2726995 |
| 07-Dec-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
mmc: complete unfinished move of CONFIG_MMC
Commit 7a777f6d6f35 ("mmc: Add generic Kconfig option") created a Kconfig entry for this option without any actual moves, then commit 44c798799f66 ("sunxi
mmc: complete unfinished move of CONFIG_MMC
Commit 7a777f6d6f35 ("mmc: Add generic Kconfig option") created a Kconfig entry for this option without any actual moves, then commit 44c798799f66 ("sunxi: Use Kconfig CONFIG_MMC") moved instances only for SUNXI.
We generally do not like such partial moves. This kind of work is automated by tools/moveconfig.py, so it is pretty easy to complete this move.
I am adding "default ARM || PPC || SANDBOX" (suggested by Tom). This shortens the configs and will ease new board porting.
This commit was created as follows:
[1] Edit Kconfig (remove the "depends on", add the "default", copy the prompt and help message from Linux)
[2] Run 'tools/moveconfig.py -y -s -r HEAD MMC'
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
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2d221489 |
| 29-Nov-2016 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
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693d4c9f |
| 16-Nov-2016 |
Semen Protsenko <semen.protsenko@linaro.org> |
spl: Remove CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS
This option isn't used for anything, so get rid of it.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
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38fed8ab |
| 16-Nov-2016 |
Semen Protsenko <semen.protsenko@linaro.org> |
spl: Convert CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to Kconfig
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> [trini: Fix sniper and kc1 migration] Signed-off-by: Tom Rini <trini@konsulk
spl: Convert CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to Kconfig
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> [trini: Fix sniper and kc1 migration] Signed-off-by: Tom Rini <trini@konsulko.com>
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711b5341 |
| 12-Oct-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts: include/configs/ls1021aqds.h include/configs/ls1021atwr.h
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f534b8f5 |
| 05-Oct-2016 |
York Sun <york.sun@nxp.com> |
arm: Move SYS_FSL_SRDS_* and SYS_HAS_SERDES to Kconfig
Move these options to Kconfig and clean up existing uses.
Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.or
arm: Move SYS_FSL_SRDS_* and SYS_HAS_SERDES to Kconfig
Move these options to Kconfig and clean up existing uses.
Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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fb2bf8c2 |
| 04-Oct-2016 |
York Sun <york.sun@nxp.com> |
arm: Move FSL_LSCH2 FSL_LSCH3 to Kconfig
Move these options to Kconfig and create a sub-menu to avoid name conflict with other architectures.
Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by:
arm: Move FSL_LSCH2 FSL_LSCH3 to Kconfig
Move these options to Kconfig and create a sub-menu to avoid name conflict with other architectures.
Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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cbe7706a |
| 26-Sep-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq
trini: Drop local memset() from examples/standalone/mem_to_mem_idma2intr.c
Signed-off-by: Tom Rini <trini@konsulko.com>
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da28e58a |
| 26-Sep-2016 |
York Sun <york.sun@nxp.com> |
armv8: ls1046a: Convert CONFIG_LS1046A to Kconfig option ARCH_LS1046A
Move this option to Kconfig and clean up existing uses.
Signed-off-by: York Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@n
armv8: ls1046a: Convert CONFIG_LS1046A to Kconfig option ARCH_LS1046A
Move this option to Kconfig and clean up existing uses.
Signed-off-by: York Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> CC: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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126fe70d |
| 07-Sep-2016 |
Shaohui Xie <Shaohui.Xie@nxp.com> |
armv8: ls1046aqds: Add LS1046AQDS board support
LS1046AQDS Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 128 Mbyte NOR flash single-chip memory * 51
armv8: ls1046aqds: Add LS1046AQDS board support
LS1046AQDS Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 64 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card
Ethernet: * Two XFI 10G ports * Two SGMII ports * Two RGMII ports
PCIe: supports Gen 1 and Gen 2
SATA 3.0: one SATA 3.0 port
USB 3.0: two micro AB connector and one type A connector
UART: supports two UARTs up to 115200 bps for console
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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dd02936f |
| 07-Sep-2016 |
Mingkai Hu <mingkai.hu@nxp.com> |
armv8: ls1046ardb: Add LS1046ARDB board support
LS1046ARDB Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 512 Mbyte NAND flash * Two 64 Mbyte high-sp
armv8: ls1046ardb: Add LS1046ARDB board support
LS1046ARDB Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 512 Mbyte NAND flash * Two 64 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card * On-board 4G eMMC
Ethernet: * Two XFI 10G ports * Two SGMII ports * Two RGMII ports
PCIe: * PCIe1 (SerDes2 Lane0) to miniPCIe slot * PCIe2 (SerDes2 Lane1) to x2 PCIe slot * PCIe3 (SerDes2 Lane2) to x4 PCIe slot
SATA: * SerDes2 Lane3 to SATA port
USB 3.0: one super speed USB 3.0 type A port one Micro-AB port
UART: supports two UARTs up to 115200 bps for console
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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