| d017606b | 08-Jun-2022 |
Algea Cao <algea.cao@rock-chips.com> |
video/drm: dw-hdmi-qp: Optimize FLT process
1.Prevents the process from getting stuck after FLT fails.
2.Prevent no signal in FRL mode.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id
video/drm: dw-hdmi-qp: Optimize FLT process
1.Prevents the process from getting stuck after FLT fails.
2.Prevent no signal in FRL mode.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I9a1d3d032027cc6d19e798dea325e9139047e07e
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| 1cf3aaec | 27-Jun-2022 |
Zhang Yubing <yubing.zhang@rock-chips.com> |
video/drm: dw-dp: just get display mode when get timing
If a bridge or panel is config, then the dp get timing function
will not run. So the necessary work such as get dpcd inf and
config dp video i
video/drm: dw-dp: just get display mode when get timing
If a bridge or panel is config, then the dp get timing function
will not run. So the necessary work such as get dpcd inf and
config dp video info should not run in get timing function,
moving them in other functions.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: Ie97531affd1ef11d3f2309ea947a7bb37d7bc301
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| 5fbef17a | 27-Jun-2022 |
Zhang Yubing <yubing.zhang@rock-chips.com> |
video/drm: dw-dp: support force hpd
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: Ifb28d776aa5a980d51ce57f22a55be95e4fc607f |
| a66bd69e | 09-Jun-2022 |
Zhang Yubing <yubing.zhang@rock-chips.com> |
video/drm: dw-dp: add detect time to detect the hotplug event
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I04c69c6f7e81728e4df2df5e6da12dad0483dfdb |
| 1f59ac36 | 05-Jul-2022 |
Wyon Bi <bivvy.bi@rock-chips.com> |
video/drm: analogix_dp: Support DT specified physical-logical lane mappings
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Ic61ba6f12b24f4179441430794c7641c9cd6753e |
| b61227a3 | 12-May-2022 |
Damon Ding <damon.ding@rock-chips.com> |
drm/rockchip: vop2: update cds div and dsc_htotal for 1 slice panel
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: If82fbe4c3247157c7731bf46a5268e7d0444a33f |
| 626a3bcc | 30-Jun-2022 |
Algea Cao <algea.cao@rock-chips.com> |
video/drm: dw-hdmi-qp: Send AVI packet once per field
Increasing the sending frequency of infoframe improves
compatibility.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I5bf4b45cb
video/drm: dw-hdmi-qp: Send AVI packet once per field
Increasing the sending frequency of infoframe improves
compatibility.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I5bf4b45cbddea02fcb3aa39262ac4ad32a3397c1
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| a5aec6bf | 29-Jun-2022 |
Algea Cao <algea.cao@rock-chips.com> |
video/drm: dw-hdmi-qp: Modify the color selection policy to be consistent with kernel
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Idf173004a45ed61f5e4473248c3fc16b59107abd |
| a6bf907a | 29-Jun-2022 |
Algea Cao <algea.cao@rock-chips.com> |
video/drm: phy-rockchip-samsung-hdptx-hdmi: Fix 10 bit pll cfg err
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I07052507fb70c0482b95caab9a4c7789fa592162 |
| 92d234f7 | 29-Jun-2022 |
Algea Cao <algea.cao@rock-chips.com> |
video/drm: dw-hdmi-qp: Fix pixel clock err
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I0b622b616d75851a109fa2d693abc72d5ceb62cc |
| 8d677a76 | 29-Jun-2022 |
Algea Cao <algea.cao@rock-chips.com> |
edid: Fix VIC choose err
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I2ae1967eed0fd2b1a4d25dc031623432d437e38e |
| 5fc2b656 | 07-May-2022 |
Damon Ding <damon.ding@rock-chips.com> |
drm/rockchip: vop2: support getting primary_plane_id from dts directly
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I636272c0ee3311785ed6b0d71fe3dab685aba07c |
| c8480b92 | 15-Jun-2022 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: fix DSI_VID_TX_CFG configuration errors
Change-Id: Ib31f91fa7ab3b93388ad20410f5a773c10bc1315
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com> |
| 0b8cf90d | 16-Jun-2022 |
Wyon Bi <bivvy.bi@rock-chips.com> |
video/drm: analogix_dp: support video BIST generation
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I4e17a0215f6114e3cb02867e6800ab060f384ca7 |
| 9b725120 | 10-Jun-2022 |
Damon Ding <damon.ding@rock-chips.com> |
drm/rockchip: vop2: unify the plane mask assignment for rk356x
It is needed to attach all the planes to the same vp when
there is only one vp being used on rk3566. If enforcing the
3+3 policy, the c
drm/rockchip: vop2: unify the plane mask assignment for rk356x
It is needed to attach all the planes to the same vp when
there is only one vp being used on rk3566. If enforcing the
3+3 policy, the calculation results of bg_dly and pre_scan_dly
will be wrong in kernel.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I5b7b7a0698e598e828b43310ef2f5b1b9ab36831
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| f8e67e0f | 08-Jun-2022 |
Wyon Bi <bivvy.bi@rock-chips.com> |
video/drm: if no panel found, check for a bridge next.
Fixes: 4bb67255c2e9 ("video/drm: Check the return value of uclass_get_device_by_ofnode()")
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Cha
video/drm: if no panel found, check for a bridge next.
Fixes: 4bb67255c2e9 ("video/drm: Check the return value of uclass_get_device_by_ofnode()")
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Icd18b7d95d041277f22f5f5d1ad748579e059045
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| 5f1357a2 | 26-May-2022 |
Zhang Yubing <yubing.zhang@rock-chips.com> |
drm/rockchip: vop2: set the dclk rate for hdmi phy pll
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I3b1df2e902cefb51dd482afe0694ac83c5195ce8 |
| 255c7946 | 26-May-2022 |
Zhang Yubing <yubing.zhang@rock-chips.com> |
video/drm: phy-rockchip-samsung-hdptx-hdmi: bind child node for clock
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I1a36542bc5c033c423d8ebceb234cc30741e8752 |
| 3e05a7b8 | 05-May-2022 |
Zhang Yubing <yubing.zhang@rock-chips.com> |
drm/rockchip: vop2: add condition for using hdmi phy pll
The hdmi phy pll can be used when both the hdmi phy is enabled
in dtsi and hdmi phy pll is include in display sub-system clock
proterty in dt
drm/rockchip: vop2: add condition for using hdmi phy pll
The hdmi phy pll can be used when both the hdmi phy is enabled
in dtsi and hdmi phy pll is include in display sub-system clock
proterty in dtsi.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: Ifa65cc2cc421b08afffa0e6030d16dab32f14468
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| 4bb67255 | 06-Jun-2022 |
Wyon Bi <bivvy.bi@rock-chips.com> |
video/drm: Check the return value of uclass_get_device_by_ofnode()
Fixes: 3893d79d956a ("video/drm: Add support for bridge chain")
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I8c8a16
video/drm: Check the return value of uclass_get_device_by_ofnode()
Fixes: 3893d79d956a ("video/drm: Add support for bridge chain")
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I8c8a16c8b8e94ff85f84569eec4b31b624f5397a
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| e2c0a7ff | 24-May-2022 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: Add support for Maxim MAX96755F
Change-Id: Idfe3c4c4b933c809c4db61969039b3bf32f5276e
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com> |
| 52d98d47 | 06-May-2022 |
Wyon Bi <bivvy.bi@rock-chips.com> |
video/drm: Add support for Maxim MAX96745
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I1d6069f99cb4460ef48f4fd4001cb8daa3aa3ae9 |
| 14aa6001 | 19-May-2022 |
Wyon Bi <bivvy.bi@rock-chips.com> |
video/drm: Add support for Maxim MAX96752F
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I552e5c1935d883f070a235e4a0ddce6e6ca07655 |
| 973d9ce8 | 14-May-2022 |
Wyon Bi <bivvy.bi@rock-chips.com> |
video/drm: export rockchip_ofnode_get_display_mode
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Ifdb01c77b1bbbdec820423c94b6fa894f06c124a |
| e8f890c7 | 09-May-2022 |
Wyon Bi <bivvy.bi@rock-chips.com> |
video/drm: Drop init callback from rockchip_panel_funcs
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I5487ed66d05773e8f960c700fdb9dbf3bfea0e5a |