1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <boot_rkimg.h> 9 #include <config.h> 10 #include <common.h> 11 #include <errno.h> 12 #include <linux/libfdt.h> 13 #include <fdtdec.h> 14 #include <fdt_support.h> 15 #include <linux/hdmi.h> 16 #include <linux/list.h> 17 #include <linux/compat.h> 18 #include <linux/media-bus-format.h> 19 #include <malloc.h> 20 #include <video.h> 21 #include <video_rockchip.h> 22 #include <video_bridge.h> 23 #include <dm/device.h> 24 #include <dm/uclass-internal.h> 25 #include <asm/arch-rockchip/resource_img.h> 26 27 #include "bmp_helper.h" 28 #include "rockchip_display.h" 29 #include "rockchip_crtc.h" 30 #include "rockchip_connector.h" 31 #include "rockchip_bridge.h" 32 #include "rockchip_phy.h" 33 #include "rockchip_panel.h" 34 #include <dm.h> 35 #include <dm/of_access.h> 36 #include <dm/ofnode.h> 37 #include <asm/io.h> 38 39 #define DRIVER_VERSION "v1.0.1" 40 41 /*********************************************************************** 42 * Rockchip UBOOT DRM driver version 43 * 44 * v1.0.0 : add basic version for rockchip drm driver(hjc) 45 * v1.0.1 : add much dsi update(hjc) 46 * 47 **********************************************************************/ 48 49 #define RK_BLK_SIZE 512 50 #define BMP_PROCESSED_FLAG 8399 51 52 DECLARE_GLOBAL_DATA_PTR; 53 static LIST_HEAD(rockchip_display_list); 54 static LIST_HEAD(logo_cache_list); 55 56 static unsigned long memory_start; 57 static unsigned long cubic_lut_memory_start; 58 static unsigned long memory_end; 59 static struct base2_info base_parameter; 60 static uint32_t crc32_table[256]; 61 62 /* 63 * the phy types are used by different connectors in public. 64 * The current version only has inno hdmi phy for hdmi and tve. 65 */ 66 enum public_use_phy { 67 NONE, 68 INNO_HDMI_PHY 69 }; 70 71 /* save public phy data */ 72 struct public_phy_data { 73 const struct rockchip_phy *phy_drv; 74 int phy_node; 75 int public_phy_type; 76 bool phy_init; 77 }; 78 79 void rockchip_display_make_crc32_table(void) 80 { 81 uint32_t c; 82 int n, k; 83 unsigned long poly; /* polynomial exclusive-or pattern */ 84 /* terms of polynomial defining this crc (except x^32): */ 85 static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26}; 86 87 /* make exclusive-or pattern from polynomial (0xedb88320L) */ 88 poly = 0L; 89 for (n = 0; n < sizeof(p) / sizeof(char); n++) 90 poly |= 1L << (31 - p[n]); 91 92 for (n = 0; n < 256; n++) { 93 c = (unsigned long)n; 94 for (k = 0; k < 8; k++) 95 c = c & 1 ? poly ^ (c >> 1) : c >> 1; 96 crc32_table[n] = cpu_to_le32(c); 97 } 98 } 99 100 uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length) 101 { 102 int i; 103 uint32_t crc; 104 crc = 0xFFFFFFFF; 105 106 for (i = 0; i < length; i++) { 107 crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8); 108 data++; 109 } 110 111 return crc ^ 0xffffffff; 112 } 113 114 int rockchip_get_baseparameter(void) 115 { 116 struct blk_desc *dev_desc; 117 disk_partition_t part_info; 118 int block_num = 2048; 119 char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN); 120 int ret = 0; 121 122 dev_desc = rockchip_get_bootdev(); 123 if (!dev_desc) { 124 printf("%s: Could not find device\n", __func__); 125 return -ENOENT; 126 } 127 128 if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) { 129 printf("Could not find baseparameter partition\n"); 130 return -ENOENT; 131 } 132 133 ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf); 134 if (ret < 0) { 135 printf("read baseparameter failed\n"); 136 return ret; 137 } 138 139 memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter)); 140 if (strncasecmp(base_parameter.head_flag, "BASP", 4)) { 141 printf("warning: bad baseparameter\n"); 142 memset(&base_parameter, 0, sizeof(base_parameter)); 143 } 144 rockchip_display_make_crc32_table(); 145 146 return ret; 147 } 148 149 struct base2_disp_info *rockchip_get_disp_info(int type, int id) 150 { 151 struct base2_disp_info *disp_info; 152 struct base2_disp_header *disp_header; 153 int i = 0, offset = -1; 154 u32 crc_val; 155 void *base_parameter_addr = (void *)&base_parameter; 156 157 for (i = 0; i < 8; i++) { 158 disp_header = &base_parameter.disp_header[i]; 159 if (disp_header->connector_type == type && 160 disp_header->connector_id == id) { 161 printf("disp info %d, type:%d, id:%d\n", i, type, id); 162 offset = disp_header->offset; 163 break; 164 } 165 } 166 167 if (offset < 0) 168 return NULL; 169 disp_info = base_parameter_addr + offset; 170 if (disp_info->screen_info[0].type != type || 171 disp_info->screen_info[0].id != id) { 172 printf("base2_disp_info couldn't be found, screen_info type[%d] or id[%d] mismatched\n", 173 disp_info->screen_info[0].type, 174 disp_info->screen_info[0].id); 175 return NULL; 176 } 177 178 if (strncasecmp(disp_info->disp_head_flag, "DISP", 4)) 179 return NULL; 180 181 crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, sizeof(struct base2_disp_info) - 4); 182 183 if (crc_val != disp_info->crc) { 184 printf("error: connector type[%d], id[%d] disp info crc check error\n", type, id); 185 return NULL; 186 } 187 188 return disp_info; 189 } 190 191 /* check which kind of public phy does connector use */ 192 static int check_public_use_phy(struct display_state *state) 193 { 194 int ret = NONE; 195 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 196 struct connector_state *conn_state = &state->conn_state; 197 198 if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) || 199 !strncmp(dev_read_name(conn_state->dev), "hdmi", 4)) 200 ret = INNO_HDMI_PHY; 201 #endif 202 203 return ret; 204 } 205 206 /* 207 * get public phy driver and initialize it. 208 * The current version only has inno hdmi phy for hdmi and tve. 209 */ 210 static int get_public_phy(struct display_state *state, 211 struct public_phy_data *data) 212 { 213 struct connector_state *conn_state = &state->conn_state; 214 struct rockchip_phy *phy; 215 struct udevice *dev; 216 int ret = 0; 217 218 switch (data->public_phy_type) { 219 case INNO_HDMI_PHY: 220 #if defined(CONFIG_ROCKCHIP_RK3328) 221 ret = uclass_get_device_by_name(UCLASS_PHY, 222 "hdmiphy@ff430000", &dev); 223 #elif defined(CONFIG_ROCKCHIP_RK322X) 224 ret = uclass_get_device_by_name(UCLASS_PHY, 225 "hdmi-phy@12030000", &dev); 226 #else 227 ret = -EINVAL; 228 #endif 229 if (ret) { 230 printf("Warn: can't find phy driver\n"); 231 return 0; 232 } 233 234 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 235 if (!phy) { 236 printf("failed to get phy driver\n"); 237 return 0; 238 } 239 240 ret = rockchip_phy_init(phy); 241 if (ret) { 242 printf("failed to init phy driver\n"); 243 return ret; 244 } 245 conn_state->phy = phy; 246 247 debug("inno hdmi phy init success, save it\n"); 248 data->phy_drv = conn_state->phy; 249 data->phy_init = true; 250 return 0; 251 default: 252 return -EINVAL; 253 } 254 } 255 256 static void init_display_buffer(ulong base) 257 { 258 memory_start = base + DRM_ROCKCHIP_FB_SIZE; 259 memory_end = memory_start; 260 cubic_lut_memory_start = memory_start + MEMORY_POOL_SIZE; 261 } 262 263 void *get_display_buffer(int size) 264 { 265 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 266 void *buf; 267 268 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 269 printf("failed to alloc %dbyte memory to display\n", size); 270 return NULL; 271 } 272 buf = (void *)roundup_memory; 273 274 memory_end = roundup_memory + size; 275 276 return buf; 277 } 278 279 static unsigned long get_display_size(void) 280 { 281 return memory_end - memory_start; 282 } 283 284 static unsigned long get_single_cubic_lut_size(void) 285 { 286 ulong cubic_lut_size; 287 int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE; 288 289 /* This is depend on IC designed */ 290 cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16; 291 cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE); 292 293 return cubic_lut_size; 294 } 295 296 static unsigned long get_cubic_lut_offset(int crtc_id) 297 { 298 return crtc_id * get_single_cubic_lut_size(); 299 } 300 301 unsigned long get_cubic_lut_buffer(int crtc_id) 302 { 303 return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size(); 304 } 305 306 static unsigned long get_cubic_memory_size(void) 307 { 308 /* Max support 4 cubic lut */ 309 return get_single_cubic_lut_size() * 4; 310 } 311 312 bool can_direct_logo(int bpp) 313 { 314 return bpp == 16 || bpp == 32; 315 } 316 317 static int connector_phy_init(struct display_state *state, 318 struct public_phy_data *data) 319 { 320 struct connector_state *conn_state = &state->conn_state; 321 int type; 322 323 /* does this connector use public phy with others */ 324 type = check_public_use_phy(state); 325 if (type == INNO_HDMI_PHY) { 326 /* there is no public phy was initialized */ 327 if (!data->phy_init) { 328 debug("start get public phy\n"); 329 data->public_phy_type = type; 330 if (get_public_phy(state, data)) { 331 printf("can't find correct public phy type\n"); 332 free(data); 333 return -EINVAL; 334 } 335 return 0; 336 } 337 338 /* if this phy has been initialized, get it directly */ 339 conn_state->phy = (struct rockchip_phy *)data->phy_drv; 340 return 0; 341 } 342 343 return 0; 344 } 345 346 static int connector_panel_init(struct display_state *state) 347 { 348 struct connector_state *conn_state = &state->conn_state; 349 struct panel_state *panel_state = &state->panel_state; 350 const struct rockchip_panel *panel = panel_state->panel; 351 ofnode dsp_lut_node; 352 int ret, len; 353 354 if (!panel) 355 return 0; 356 357 dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut"); 358 if (!ofnode_valid(dsp_lut_node)) { 359 debug("%s can not find dsp-lut node\n", __func__); 360 return 0; 361 } 362 363 ofnode_get_property(dsp_lut_node, "gamma-lut", &len); 364 if (len > 0) { 365 conn_state->gamma.size = len / sizeof(u32); 366 conn_state->gamma.lut = malloc(len); 367 if (!conn_state->gamma.lut) { 368 printf("malloc gamma lut failed\n"); 369 return -ENOMEM; 370 } 371 ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut", 372 conn_state->gamma.lut, 373 conn_state->gamma.size); 374 if (ret) { 375 printf("Cannot decode gamma_lut\n"); 376 conn_state->gamma.lut = NULL; 377 return -EINVAL; 378 } 379 panel_state->dsp_lut_node = dsp_lut_node; 380 } 381 382 return 0; 383 } 384 385 int drm_mode_vrefresh(const struct drm_display_mode *mode) 386 { 387 int refresh = 0; 388 unsigned int calc_val; 389 390 if (mode->vrefresh > 0) { 391 refresh = mode->vrefresh; 392 } else if (mode->htotal > 0 && mode->vtotal > 0) { 393 int vtotal; 394 395 vtotal = mode->vtotal; 396 /* work out vrefresh the value will be x1000 */ 397 calc_val = (mode->clock * 1000); 398 calc_val /= mode->htotal; 399 refresh = (calc_val + vtotal / 2) / vtotal; 400 401 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 402 refresh *= 2; 403 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 404 refresh /= 2; 405 if (mode->vscan > 1) 406 refresh /= mode->vscan; 407 } 408 return refresh; 409 } 410 411 static int display_get_detail_timing(ofnode node, struct drm_display_mode *mode) 412 { 413 int hactive, vactive, pixelclock; 414 int hfront_porch, hback_porch, hsync_len; 415 int vfront_porch, vback_porch, vsync_len; 416 int val, flags = 0; 417 418 #define FDT_GET_INT(val, name) \ 419 val = ofnode_read_s32_default(node, name, -1); \ 420 if (val < 0) { \ 421 printf("Can't get %s\n", name); \ 422 return -ENXIO; \ 423 } 424 425 #define FDT_GET_INT_DEFAULT(val, name, default) \ 426 val = ofnode_read_s32_default(node, name, default); 427 428 FDT_GET_INT(hactive, "hactive"); 429 FDT_GET_INT(vactive, "vactive"); 430 FDT_GET_INT(pixelclock, "clock-frequency"); 431 FDT_GET_INT(hsync_len, "hsync-len"); 432 FDT_GET_INT(hfront_porch, "hfront-porch"); 433 FDT_GET_INT(hback_porch, "hback-porch"); 434 FDT_GET_INT(vsync_len, "vsync-len"); 435 FDT_GET_INT(vfront_porch, "vfront-porch"); 436 FDT_GET_INT(vback_porch, "vback-porch"); 437 FDT_GET_INT(val, "hsync-active"); 438 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 439 FDT_GET_INT(val, "vsync-active"); 440 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 441 FDT_GET_INT(val, "pixelclk-active"); 442 flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 443 444 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 445 if (val == DRM_MODE_FLAG_XMIRROR) { 446 flags |= DRM_MODE_FLAG_XMIRROR; 447 } else if (val == DRM_MODE_FLAG_YMIRROR) { 448 flags |= DRM_MODE_FLAG_YMIRROR; 449 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 450 flags |= DRM_MODE_FLAG_XMIRROR; 451 flags |= DRM_MODE_FLAG_YMIRROR; 452 } 453 mode->hdisplay = hactive; 454 mode->hsync_start = mode->hdisplay + hfront_porch; 455 mode->hsync_end = mode->hsync_start + hsync_len; 456 mode->htotal = mode->hsync_end + hback_porch; 457 458 mode->vdisplay = vactive; 459 mode->vsync_start = mode->vdisplay + vfront_porch; 460 mode->vsync_end = mode->vsync_start + vsync_len; 461 mode->vtotal = mode->vsync_end + vback_porch; 462 463 mode->clock = pixelclock / 1000; 464 mode->flags = flags; 465 466 return 0; 467 } 468 469 static int display_get_force_timing_from_dts(ofnode node, struct drm_display_mode *mode) 470 { 471 int ret = 0; 472 473 ret = display_get_detail_timing(node, mode); 474 475 if (ret) { 476 mode->clock = 74250; 477 mode->flags = 0x5; 478 mode->hdisplay = 1280; 479 mode->hsync_start = 1390; 480 mode->hsync_end = 1430; 481 mode->htotal = 1650; 482 mode->hskew = 0; 483 mode->vdisplay = 720; 484 mode->vsync_start = 725; 485 mode->vsync_end = 730; 486 mode->vtotal = 750; 487 mode->vrefresh = 60; 488 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 489 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 490 } 491 492 printf("route node %s force_timing, use %dx%dp%d as default mode\n", 493 ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay, 494 mode->vscan); 495 496 return 0; 497 } 498 499 static int display_get_timing_from_dts(struct panel_state *panel_state, 500 struct drm_display_mode *mode) 501 { 502 struct rockchip_panel *panel = panel_state->panel; 503 struct ofnode_phandle_args args; 504 ofnode dt, timing; 505 int ret; 506 507 dt = dev_read_subnode(panel->dev, "display-timings"); 508 if (ofnode_valid(dt)) { 509 ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL, 510 0, 0, &args); 511 if (ret) 512 return ret; 513 514 timing = args.node; 515 } else { 516 timing = dev_read_subnode(panel->dev, "panel-timing"); 517 } 518 519 if (!ofnode_valid(timing)) { 520 printf("failed to get display timings from DT\n"); 521 return -ENXIO; 522 } 523 524 display_get_detail_timing(timing, mode); 525 526 return 0; 527 } 528 529 /** 530 * drm_mode_max_resolution_filter - mark modes out of vop max resolution 531 * @edid_data: structure store mode list 532 * @max_output: vop max output resolution 533 */ 534 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 535 struct vop_rect *max_output) 536 { 537 int i; 538 539 for (i = 0; i < edid_data->modes; i++) { 540 if (edid_data->mode_buf[i].hdisplay > max_output->width || 541 edid_data->mode_buf[i].vdisplay > max_output->height) 542 edid_data->mode_buf[i].invalid = true; 543 } 544 } 545 546 /** 547 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 548 * @p: mode 549 * @adjust_flags: a combination of adjustment flags 550 * 551 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 552 * 553 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 554 * interlaced modes. 555 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 556 * buffers containing two eyes (only adjust the timings when needed, eg. for 557 * "frame packing" or "side by side full"). 558 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 559 * be performed for doublescan and vscan > 1 modes respectively. 560 */ 561 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 562 { 563 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 564 return; 565 566 if (p->flags & DRM_MODE_FLAG_DBLCLK) 567 p->crtc_clock = 2 * p->clock; 568 else 569 p->crtc_clock = p->clock; 570 p->crtc_hdisplay = p->hdisplay; 571 p->crtc_hsync_start = p->hsync_start; 572 p->crtc_hsync_end = p->hsync_end; 573 p->crtc_htotal = p->htotal; 574 p->crtc_hskew = p->hskew; 575 p->crtc_vdisplay = p->vdisplay; 576 p->crtc_vsync_start = p->vsync_start; 577 p->crtc_vsync_end = p->vsync_end; 578 p->crtc_vtotal = p->vtotal; 579 580 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 581 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 582 p->crtc_vdisplay /= 2; 583 p->crtc_vsync_start /= 2; 584 p->crtc_vsync_end /= 2; 585 p->crtc_vtotal /= 2; 586 } 587 } 588 589 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 590 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 591 p->crtc_vdisplay *= 2; 592 p->crtc_vsync_start *= 2; 593 p->crtc_vsync_end *= 2; 594 p->crtc_vtotal *= 2; 595 } 596 } 597 598 if (!(adjust_flags & CRTC_NO_VSCAN)) { 599 if (p->vscan > 1) { 600 p->crtc_vdisplay *= p->vscan; 601 p->crtc_vsync_start *= p->vscan; 602 p->crtc_vsync_end *= p->vscan; 603 p->crtc_vtotal *= p->vscan; 604 } 605 } 606 607 if (adjust_flags & CRTC_STEREO_DOUBLE) { 608 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 609 610 switch (layout) { 611 case DRM_MODE_FLAG_3D_FRAME_PACKING: 612 p->crtc_clock *= 2; 613 p->crtc_vdisplay += p->crtc_vtotal; 614 p->crtc_vsync_start += p->crtc_vtotal; 615 p->crtc_vsync_end += p->crtc_vtotal; 616 p->crtc_vtotal += p->crtc_vtotal; 617 break; 618 } 619 } 620 621 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 622 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 623 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 624 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 625 } 626 627 /** 628 * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 629 * output format 630 * 631 * @connector: drm connector under action. 632 * @mode: video mode to be tested. 633 * 634 * Returns: 635 * true if the mode can be supported in YCBCR420 format 636 * false if not. 637 */ 638 bool drm_mode_is_420_only(const struct drm_display_info *display, 639 struct drm_display_mode *mode) 640 { 641 u8 vic = drm_match_cea_mode(mode); 642 643 return test_bit(vic, display->hdmi.y420_vdb_modes); 644 } 645 646 /** 647 * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 648 * output format also (along with RGB/YCBCR444/422) 649 * 650 * @display: display under action. 651 * @mode: video mode to be tested. 652 * 653 * Returns: 654 * true if the mode can be support YCBCR420 format 655 * false if not. 656 */ 657 bool drm_mode_is_420_also(const struct drm_display_info *display, 658 struct drm_display_mode *mode) 659 { 660 u8 vic = drm_match_cea_mode(mode); 661 662 return test_bit(vic, display->hdmi.y420_cmdb_modes); 663 } 664 665 /** 666 * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 667 * output format 668 * 669 * @display: display under action. 670 * @mode: video mode to be tested. 671 * 672 * Returns: 673 * true if the mode can be supported in YCBCR420 format 674 * false if not. 675 */ 676 bool drm_mode_is_420(const struct drm_display_info *display, 677 struct drm_display_mode *mode) 678 { 679 return drm_mode_is_420_only(display, mode) || 680 drm_mode_is_420_also(display, mode); 681 } 682 683 static int display_get_timing(struct display_state *state) 684 { 685 struct connector_state *conn_state = &state->conn_state; 686 struct drm_display_mode *mode = &conn_state->mode; 687 const struct drm_display_mode *m; 688 struct panel_state *panel_state = &state->panel_state; 689 const struct rockchip_panel *panel = panel_state->panel; 690 691 if (dev_of_valid(panel->dev) && 692 !display_get_timing_from_dts(panel_state, mode)) { 693 printf("Using display timing dts\n"); 694 return 0; 695 } 696 697 if (panel->data) { 698 m = (const struct drm_display_mode *)panel->data; 699 memcpy(mode, m, sizeof(*m)); 700 printf("Using display timing from compatible panel driver\n"); 701 return 0; 702 } 703 704 return -ENODEV; 705 } 706 707 static int display_pre_init(void) 708 { 709 struct display_state *state; 710 int ret = 0; 711 712 list_for_each_entry(state, &rockchip_display_list, head) { 713 struct connector_state *conn_state = &state->conn_state; 714 const struct rockchip_connector *conn = conn_state->connector; 715 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 716 struct crtc_state *crtc_state = &state->crtc_state; 717 struct rockchip_crtc *crtc = crtc_state->crtc; 718 719 if (conn_funcs->pre_init) { 720 ret = conn_funcs->pre_init(state); 721 if (ret) 722 printf("pre init conn error\n"); 723 } 724 crtc->vps[crtc_state->crtc_id].output_type = conn_state->type; 725 } 726 return ret; 727 } 728 729 static int display_use_force_mode(struct display_state *state) 730 { 731 struct connector_state *conn_state = &state->conn_state; 732 struct drm_display_mode *mode = &conn_state->mode; 733 734 conn_state->bpc = 8; 735 memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode)); 736 conn_state->bus_format = state->force_bus_format; 737 738 return 0; 739 } 740 741 static int display_get_edid_mode(struct display_state *state) 742 { 743 int ret = 0; 744 struct connector_state *conn_state = &state->conn_state; 745 struct drm_display_mode *mode = &conn_state->mode; 746 int bpc; 747 748 ret = edid_get_drm_mode(conn_state->edid, sizeof(conn_state->edid), mode, &bpc); 749 if (!ret) { 750 conn_state->bpc = bpc; 751 edid_print_info((void *)&conn_state->edid); 752 } else { 753 conn_state->bpc = 8; 754 mode->clock = 74250; 755 mode->flags = 0x5; 756 mode->hdisplay = 1280; 757 mode->hsync_start = 1390; 758 mode->hsync_end = 1430; 759 mode->htotal = 1650; 760 mode->hskew = 0; 761 mode->vdisplay = 720; 762 mode->vsync_start = 725; 763 mode->vsync_end = 730; 764 mode->vtotal = 750; 765 mode->vrefresh = 60; 766 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 767 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 768 769 printf("error: %s get mode from edid failed, use 720p60 as default mode\n", conn_state->dev->name); 770 } 771 772 return ret; 773 } 774 775 static int display_init(struct display_state *state) 776 { 777 struct connector_state *conn_state = &state->conn_state; 778 struct panel_state *panel_state = &state->panel_state; 779 const struct rockchip_connector *conn = conn_state->connector; 780 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 781 struct crtc_state *crtc_state = &state->crtc_state; 782 struct rockchip_crtc *crtc = crtc_state->crtc; 783 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 784 struct drm_display_mode *mode = &conn_state->mode; 785 const char *compatible; 786 int ret = 0; 787 static bool __print_once = false; 788 789 if (!__print_once) { 790 __print_once = true; 791 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 792 } 793 794 if (state->is_init) 795 return 0; 796 797 if (!conn_funcs || !crtc_funcs) { 798 printf("failed to find connector or crtc functions\n"); 799 return -ENXIO; 800 } 801 802 if (crtc_state->crtc->active && !crtc_state->ports_node && 803 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 804 sizeof(struct drm_display_mode))) { 805 printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 806 crtc_state->dev->name, 807 crtc_state->crtc->active_mode.type, 808 crtc_state->crtc->active_mode.hdisplay, 809 crtc_state->crtc->active_mode.vdisplay, 810 crtc_state->crtc->active_mode.vrefresh); 811 return -ENODEV; 812 } 813 814 if (crtc_funcs->preinit) { 815 ret = crtc_funcs->preinit(state); 816 if (ret) 817 return ret; 818 } 819 820 if (panel_state->panel) 821 rockchip_panel_init(panel_state->panel, state); 822 823 if (conn_state->bridge) 824 rockchip_bridge_init(conn_state->bridge, state); 825 826 if (conn_funcs->init) { 827 ret = conn_funcs->init(state); 828 if (ret) 829 goto deinit; 830 } 831 832 if (conn_state->phy) 833 rockchip_phy_init(conn_state->phy); 834 835 /* 836 * support hotplug, but not connect; 837 */ 838 #ifdef CONFIG_ROCKCHIP_DRM_TVE 839 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 840 printf("hdmi plugin ,skip tve\n"); 841 goto deinit; 842 } 843 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 844 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 845 printf("hdmi plugin ,skip tve\n"); 846 goto deinit; 847 } 848 #endif 849 if (conn_funcs->detect) { 850 ret = conn_funcs->detect(state); 851 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 852 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 853 crtc->hdmi_hpd = ret; 854 #endif 855 if (!ret && !state->force_output) { 856 printf("%s disconnected\n", conn_state->dev->name); 857 goto deinit; 858 } 859 } 860 861 if (panel_state->panel) { 862 ret = display_get_timing(state); 863 if (!ret) 864 conn_state->bpc = panel_state->panel->bpc; 865 #if defined(CONFIG_I2C_EDID) 866 if (ret < 0 && conn_funcs->get_edid) { 867 rockchip_panel_prepare(panel_state->panel); 868 ret = conn_funcs->get_edid(state); 869 if (!ret) 870 display_get_edid_mode(state); 871 } 872 #endif 873 } else if (conn_state->bridge) { 874 ret = video_bridge_read_edid(conn_state->bridge->dev, 875 conn_state->edid, EDID_SIZE); 876 if (ret > 0) { 877 #if defined(CONFIG_I2C_EDID) 878 display_get_edid_mode(state); 879 #endif 880 } else { 881 ret = video_bridge_get_timing(conn_state->bridge->dev); 882 } 883 } else if (conn_funcs->get_timing) { 884 ret = conn_funcs->get_timing(state); 885 } else if (conn_funcs->get_edid) { 886 ret = conn_funcs->get_edid(state); 887 #if defined(CONFIG_I2C_EDID) 888 if (!ret) 889 display_get_edid_mode(state); 890 #endif 891 } 892 893 if (ret && !state->force_output) 894 goto deinit; 895 if (state->force_output) 896 display_use_force_mode(state); 897 898 /* rk356x series drive mipi pixdata on posedge */ 899 compatible = dev_read_string(conn_state->dev, "compatible"); 900 if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi")) 901 conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA; 902 903 printf("%s: %s detailed mode clock %u kHz, flags[%x]\n" 904 " H: %04d %04d %04d %04d\n" 905 " V: %04d %04d %04d %04d\n" 906 "bus_format: %x\n", 907 conn_state->dev->name, 908 state->force_output ? "use force output" : "", 909 mode->clock, mode->flags, 910 mode->hdisplay, mode->hsync_start, 911 mode->hsync_end, mode->htotal, 912 mode->vdisplay, mode->vsync_start, 913 mode->vsync_end, mode->vtotal, 914 conn_state->bus_format); 915 916 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 917 918 if (conn_state->bridge) 919 rockchip_bridge_mode_set(conn_state->bridge, &conn_state->mode); 920 921 if (crtc_funcs->init) { 922 ret = crtc_funcs->init(state); 923 if (ret) 924 goto deinit; 925 } 926 state->is_init = 1; 927 928 crtc_state->crtc->active = true; 929 memcpy(&crtc_state->crtc->active_mode, 930 &conn_state->mode, sizeof(struct drm_display_mode)); 931 932 return 0; 933 934 deinit: 935 if (conn_funcs->deinit) 936 conn_funcs->deinit(state); 937 return ret; 938 } 939 940 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 941 { 942 struct crtc_state *crtc_state = &state->crtc_state; 943 const struct rockchip_crtc *crtc = crtc_state->crtc; 944 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 945 int ret; 946 947 if (!state->is_init) 948 return -EINVAL; 949 950 if (crtc_funcs->send_mcu_cmd) { 951 ret = crtc_funcs->send_mcu_cmd(state, type, val); 952 if (ret) 953 return ret; 954 } 955 956 return 0; 957 } 958 959 static int display_set_plane(struct display_state *state) 960 { 961 struct crtc_state *crtc_state = &state->crtc_state; 962 const struct rockchip_crtc *crtc = crtc_state->crtc; 963 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 964 int ret; 965 966 if (!state->is_init) 967 return -EINVAL; 968 969 if (crtc_funcs->set_plane) { 970 ret = crtc_funcs->set_plane(state); 971 if (ret) 972 return ret; 973 } 974 975 return 0; 976 } 977 978 static int display_enable(struct display_state *state) 979 { 980 struct connector_state *conn_state = &state->conn_state; 981 const struct rockchip_connector *conn = conn_state->connector; 982 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 983 struct crtc_state *crtc_state = &state->crtc_state; 984 const struct rockchip_crtc *crtc = crtc_state->crtc; 985 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 986 struct panel_state *panel_state = &state->panel_state; 987 988 if (!state->is_init) 989 return -EINVAL; 990 991 if (state->is_enable) 992 return 0; 993 994 if (crtc_funcs->prepare) 995 crtc_funcs->prepare(state); 996 997 if (conn_funcs->prepare) 998 conn_funcs->prepare(state); 999 1000 if (conn_state->bridge) 1001 rockchip_bridge_pre_enable(conn_state->bridge); 1002 1003 if (panel_state->panel) 1004 rockchip_panel_prepare(panel_state->panel); 1005 1006 if (crtc_funcs->enable) 1007 crtc_funcs->enable(state); 1008 1009 if (conn_funcs->enable) 1010 conn_funcs->enable(state); 1011 1012 if (conn_state->bridge) 1013 rockchip_bridge_enable(conn_state->bridge); 1014 1015 if (panel_state->panel) 1016 rockchip_panel_enable(panel_state->panel); 1017 1018 state->is_enable = true; 1019 1020 return 0; 1021 } 1022 1023 static int display_disable(struct display_state *state) 1024 { 1025 struct connector_state *conn_state = &state->conn_state; 1026 const struct rockchip_connector *conn = conn_state->connector; 1027 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 1028 struct crtc_state *crtc_state = &state->crtc_state; 1029 const struct rockchip_crtc *crtc = crtc_state->crtc; 1030 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 1031 struct panel_state *panel_state = &state->panel_state; 1032 1033 if (!state->is_init) 1034 return 0; 1035 1036 if (!state->is_enable) 1037 return 0; 1038 1039 if (panel_state->panel) 1040 rockchip_panel_disable(panel_state->panel); 1041 1042 if (conn_state->bridge) 1043 rockchip_bridge_disable(conn_state->bridge); 1044 1045 if (conn_funcs->disable) 1046 conn_funcs->disable(state); 1047 1048 if (crtc_funcs->disable) 1049 crtc_funcs->disable(state); 1050 1051 if (panel_state->panel) 1052 rockchip_panel_unprepare(panel_state->panel); 1053 1054 if (conn_state->bridge) 1055 rockchip_bridge_post_disable(conn_state->bridge); 1056 1057 if (conn_funcs->unprepare) 1058 conn_funcs->unprepare(state); 1059 1060 state->is_enable = 0; 1061 state->is_init = 0; 1062 1063 return 0; 1064 } 1065 1066 static int display_logo(struct display_state *state) 1067 { 1068 struct crtc_state *crtc_state = &state->crtc_state; 1069 struct connector_state *conn_state = &state->conn_state; 1070 struct logo_info *logo = &state->logo; 1071 int hdisplay, vdisplay, ret; 1072 1073 ret = display_init(state); 1074 if (!state->is_init || ret) 1075 return -ENODEV; 1076 1077 switch (logo->bpp) { 1078 case 16: 1079 crtc_state->format = ROCKCHIP_FMT_RGB565; 1080 break; 1081 case 24: 1082 crtc_state->format = ROCKCHIP_FMT_RGB888; 1083 break; 1084 case 32: 1085 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 1086 break; 1087 default: 1088 printf("can't support bmp bits[%d]\n", logo->bpp); 1089 return -EINVAL; 1090 } 1091 hdisplay = conn_state->mode.hdisplay; 1092 vdisplay = conn_state->mode.vdisplay; 1093 crtc_state->src_rect.w = logo->width; 1094 crtc_state->src_rect.h = logo->height; 1095 crtc_state->src_rect.x = 0; 1096 crtc_state->src_rect.y = 0; 1097 crtc_state->ymirror = logo->ymirror; 1098 crtc_state->rb_swap = 0; 1099 1100 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 1101 crtc_state->xvir = ALIGN(crtc_state->src_rect.w * logo->bpp, 32) >> 5; 1102 1103 if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 1104 crtc_state->crtc_rect.x = 0; 1105 crtc_state->crtc_rect.y = 0; 1106 crtc_state->crtc_rect.w = hdisplay; 1107 crtc_state->crtc_rect.h = vdisplay; 1108 } else { 1109 if (crtc_state->src_rect.w >= hdisplay) { 1110 crtc_state->crtc_rect.x = 0; 1111 crtc_state->crtc_rect.w = hdisplay; 1112 } else { 1113 crtc_state->crtc_rect.x = (hdisplay - crtc_state->src_rect.w) / 2; 1114 crtc_state->crtc_rect.w = crtc_state->src_rect.w; 1115 } 1116 1117 if (crtc_state->src_rect.h >= vdisplay) { 1118 crtc_state->crtc_rect.y = 0; 1119 crtc_state->crtc_rect.h = vdisplay; 1120 } else { 1121 crtc_state->crtc_rect.y = (vdisplay - crtc_state->src_rect.h) / 2; 1122 crtc_state->crtc_rect.h = crtc_state->src_rect.h; 1123 } 1124 } 1125 1126 display_set_plane(state); 1127 display_enable(state); 1128 1129 return 0; 1130 } 1131 1132 static int get_crtc_id(ofnode connect, bool is_ports_node) 1133 { 1134 struct device_node *port_node; 1135 struct device_node *remote; 1136 int phandle; 1137 int val; 1138 1139 if (is_ports_node) { 1140 port_node = of_get_parent(connect.np); 1141 if (!port_node) 1142 goto err; 1143 1144 val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1); 1145 if (val < 0) 1146 goto err; 1147 } else { 1148 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 1149 if (phandle < 0) 1150 goto err; 1151 1152 remote = of_find_node_by_phandle(phandle); 1153 if (!remote) 1154 goto err; 1155 1156 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 1157 if (val < 0) 1158 goto err; 1159 } 1160 1161 return val; 1162 err: 1163 printf("Can't get crtc id, default set to id = 0\n"); 1164 return 0; 1165 } 1166 1167 static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 1168 { 1169 ofnode mcu_node; 1170 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 1171 1172 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 1173 if (!ofnode_valid(mcu_node)) 1174 return -ENODEV; 1175 1176 #define FDT_GET_MCU_INT(val, name) \ 1177 do { \ 1178 val = ofnode_read_s32_default(mcu_node, name, -1); \ 1179 if (val < 0) { \ 1180 printf("Can't get %s\n", name); \ 1181 return -ENXIO; \ 1182 } \ 1183 } while (0) 1184 1185 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 1186 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 1187 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 1188 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 1189 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 1190 1191 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 1192 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 1193 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 1194 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 1195 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 1196 1197 return 0; 1198 } 1199 1200 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 1201 { 1202 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 1203 1204 list_for_each_entry(tmp, &logo_cache_list, head) { 1205 if (!strcmp(tmp->name, bmp)) { 1206 logo_cache = tmp; 1207 break; 1208 } 1209 } 1210 1211 if (!logo_cache) { 1212 logo_cache = malloc(sizeof(*logo_cache)); 1213 if (!logo_cache) { 1214 printf("failed to alloc memory for logo cache\n"); 1215 return NULL; 1216 } 1217 memset(logo_cache, 0, sizeof(*logo_cache)); 1218 strcpy(logo_cache->name, bmp); 1219 INIT_LIST_HEAD(&logo_cache->head); 1220 list_add_tail(&logo_cache->head, &logo_cache_list); 1221 } 1222 1223 return logo_cache; 1224 } 1225 1226 /* Note: used only for rkfb kernel driver */ 1227 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 1228 { 1229 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1230 void *dst = NULL; 1231 int len, size; 1232 struct bmp_header *header; 1233 1234 if (!logo || !bmp_name) 1235 return -EINVAL; 1236 1237 header = malloc(RK_BLK_SIZE); 1238 if (!header) 1239 return -ENOMEM; 1240 1241 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1242 if (len != RK_BLK_SIZE) { 1243 free(header); 1244 return -EINVAL; 1245 } 1246 size = get_unaligned_le32(&header->file_size); 1247 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 1248 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 1249 if (len != size) { 1250 printf("failed to load bmp %s\n", bmp_name); 1251 free(header); 1252 return -ENOENT; 1253 } 1254 1255 logo->mem = dst; 1256 #endif 1257 1258 return 0; 1259 } 1260 1261 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 1262 { 1263 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1264 struct rockchip_logo_cache *logo_cache; 1265 struct bmp_header *header; 1266 void *dst = NULL, *pdst; 1267 int size, len; 1268 int ret = 0; 1269 int reserved = 0; 1270 int dst_size; 1271 1272 if (!logo || !bmp_name) 1273 return -EINVAL; 1274 logo_cache = find_or_alloc_logo_cache(bmp_name); 1275 if (!logo_cache) 1276 return -ENOMEM; 1277 1278 if (logo_cache->logo.mem) { 1279 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1280 return 0; 1281 } 1282 1283 header = malloc(RK_BLK_SIZE); 1284 if (!header) 1285 return -ENOMEM; 1286 1287 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1288 if (len != RK_BLK_SIZE) { 1289 ret = -EINVAL; 1290 goto free_header; 1291 } 1292 1293 logo->bpp = get_unaligned_le16(&header->bit_count); 1294 logo->width = get_unaligned_le32(&header->width); 1295 logo->height = get_unaligned_le32(&header->height); 1296 dst_size = logo->width * logo->height * logo->bpp >> 3; 1297 reserved = get_unaligned_le32(&header->reserved); 1298 if (logo->height < 0) 1299 logo->height = -logo->height; 1300 size = get_unaligned_le32(&header->file_size); 1301 if (!can_direct_logo(logo->bpp)) { 1302 if (size > MEMORY_POOL_SIZE) { 1303 printf("failed to use boot buf as temp bmp buffer\n"); 1304 ret = -ENOMEM; 1305 goto free_header; 1306 } 1307 pdst = get_display_buffer(size); 1308 1309 } else { 1310 pdst = get_display_buffer(size); 1311 dst = pdst; 1312 } 1313 1314 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 1315 if (len != size) { 1316 printf("failed to load bmp %s\n", bmp_name); 1317 ret = -ENOENT; 1318 goto free_header; 1319 } 1320 1321 if (!can_direct_logo(logo->bpp)) { 1322 /* 1323 * TODO: force use 16bpp if bpp less than 16; 1324 */ 1325 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1326 dst_size = logo->width * logo->height * logo->bpp >> 3; 1327 dst = get_display_buffer(dst_size); 1328 if (!dst) { 1329 ret = -ENOMEM; 1330 goto free_header; 1331 } 1332 if (bmpdecoder(pdst, dst, logo->bpp)) { 1333 printf("failed to decode bmp %s\n", bmp_name); 1334 ret = -EINVAL; 1335 goto free_header; 1336 } 1337 1338 logo->offset = 0; 1339 logo->ymirror = 0; 1340 } else { 1341 logo->offset = get_unaligned_le32(&header->data_offset); 1342 if (reserved == BMP_PROCESSED_FLAG) 1343 logo->ymirror = 0; 1344 else 1345 logo->ymirror = 1; 1346 } 1347 logo->mem = dst; 1348 1349 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1350 1351 flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE)); 1352 1353 free_header: 1354 1355 free(header); 1356 1357 return ret; 1358 #else 1359 return -EINVAL; 1360 #endif 1361 } 1362 1363 void rockchip_show_fbbase(ulong fbbase) 1364 { 1365 struct display_state *s; 1366 1367 list_for_each_entry(s, &rockchip_display_list, head) { 1368 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1369 s->logo.mem = (char *)fbbase; 1370 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1371 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1372 s->logo.bpp = 32; 1373 s->logo.ymirror = 0; 1374 1375 display_logo(s); 1376 } 1377 } 1378 1379 int rockchip_show_bmp(const char *bmp) 1380 { 1381 struct display_state *s; 1382 int ret = 0; 1383 1384 if (!bmp) { 1385 list_for_each_entry(s, &rockchip_display_list, head) 1386 display_disable(s); 1387 return -ENOENT; 1388 } 1389 1390 list_for_each_entry(s, &rockchip_display_list, head) { 1391 s->logo.mode = s->charge_logo_mode; 1392 if (load_bmp_logo(&s->logo, bmp)) 1393 continue; 1394 ret = display_logo(s); 1395 } 1396 1397 return ret; 1398 } 1399 1400 int rockchip_show_logo(void) 1401 { 1402 struct display_state *s; 1403 int ret = 0; 1404 1405 list_for_each_entry(s, &rockchip_display_list, head) { 1406 s->logo.mode = s->logo_mode; 1407 if (load_bmp_logo(&s->logo, s->ulogo_name)) 1408 printf("failed to display uboot logo\n"); 1409 else 1410 ret = display_logo(s); 1411 1412 /* Load kernel bmp in rockchip_display_fixup() later */ 1413 } 1414 1415 return ret; 1416 } 1417 1418 enum { 1419 PORT_DIR_IN, 1420 PORT_DIR_OUT, 1421 }; 1422 1423 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev) 1424 { 1425 ofnode panel_node, ports, port, ep, port_parent_node; 1426 struct udevice *panel_dev; 1427 int ret; 1428 1429 panel_node = dev_read_subnode(dev, "panel"); 1430 if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) { 1431 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node, 1432 &panel_dev); 1433 if (!ret) 1434 goto found; 1435 } 1436 1437 ports = dev_read_subnode(dev, "ports"); 1438 if (!ofnode_valid(ports)) 1439 return NULL; 1440 1441 ofnode_for_each_subnode(port, ports) { 1442 u32 reg; 1443 1444 if (ofnode_read_u32(port, "reg", ®)) 1445 continue; 1446 1447 if (reg != PORT_DIR_OUT) 1448 continue; 1449 1450 ofnode_for_each_subnode(ep, port) { 1451 ofnode _ep, _port; 1452 uint phandle; 1453 bool is_ports_node = false; 1454 1455 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1456 continue; 1457 1458 _ep = ofnode_get_by_phandle(phandle); 1459 if (!ofnode_valid(_ep)) 1460 continue; 1461 1462 _port = ofnode_get_parent(_ep); 1463 if (!ofnode_valid(_port)) 1464 continue; 1465 1466 port_parent_node = ofnode_get_parent(_port); 1467 is_ports_node = strstr(port_parent_node.np->full_name, "ports") ? 1 : 0; 1468 if (is_ports_node) 1469 panel_node = ofnode_get_parent(port_parent_node); 1470 else 1471 panel_node = ofnode_get_parent(_port); 1472 if (!ofnode_valid(panel_node)) 1473 continue; 1474 1475 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, 1476 panel_node, 1477 &panel_dev); 1478 if (!ret) 1479 goto found; 1480 } 1481 } 1482 1483 return NULL; 1484 1485 found: 1486 return (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1487 } 1488 1489 static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev) 1490 { 1491 ofnode node, ports, port, ep; 1492 struct udevice *dev; 1493 int ret; 1494 1495 ports = dev_read_subnode(conn_dev, "ports"); 1496 if (!ofnode_valid(ports)) 1497 return NULL; 1498 1499 ofnode_for_each_subnode(port, ports) { 1500 u32 reg; 1501 1502 if (ofnode_read_u32(port, "reg", ®)) 1503 continue; 1504 1505 if (reg != PORT_DIR_OUT) 1506 continue; 1507 1508 ofnode_for_each_subnode(ep, port) { 1509 ofnode _ep, _port, _ports; 1510 uint phandle; 1511 1512 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1513 continue; 1514 1515 _ep = ofnode_get_by_phandle(phandle); 1516 if (!ofnode_valid(_ep)) 1517 continue; 1518 1519 _port = ofnode_get_parent(_ep); 1520 if (!ofnode_valid(_port)) 1521 continue; 1522 1523 _ports = ofnode_get_parent(_port); 1524 if (!ofnode_valid(_ports)) 1525 continue; 1526 1527 node = ofnode_get_parent(_ports); 1528 if (!ofnode_valid(node)) 1529 continue; 1530 1531 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, 1532 node, &dev); 1533 if (!ret) 1534 goto found; 1535 } 1536 } 1537 1538 return NULL; 1539 1540 found: 1541 return (struct rockchip_bridge *)dev_get_driver_data(dev); 1542 } 1543 1544 static struct udevice *rockchip_of_find_connector(ofnode endpoint) 1545 { 1546 ofnode ep, port, ports, conn; 1547 uint phandle; 1548 struct udevice *dev; 1549 int ret; 1550 1551 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1552 return NULL; 1553 1554 ep = ofnode_get_by_phandle(phandle); 1555 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1556 return NULL; 1557 1558 port = ofnode_get_parent(ep); 1559 if (!ofnode_valid(port)) 1560 return NULL; 1561 1562 ports = ofnode_get_parent(port); 1563 if (!ofnode_valid(ports)) 1564 return NULL; 1565 1566 conn = ofnode_get_parent(ports); 1567 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1568 return NULL; 1569 1570 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1571 if (ret) 1572 return NULL; 1573 1574 return dev; 1575 } 1576 1577 static bool rockchip_get_display_path_status(ofnode endpoint) 1578 { 1579 ofnode ep; 1580 uint phandle; 1581 1582 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1583 return false; 1584 1585 ep = ofnode_get_by_phandle(phandle); 1586 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1587 return false; 1588 1589 return true; 1590 } 1591 1592 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1593 { 1594 struct udevice *phy_dev; 1595 int ret; 1596 1597 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1598 if (ret) 1599 return NULL; 1600 1601 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1602 } 1603 1604 #if defined(CONFIG_ROCKCHIP_RK3568) 1605 static int rockchip_display_fixup_dts(void *blob) 1606 { 1607 ofnode route_node, route_subnode, conn_ep, conn_port; 1608 const struct device_node *route_sub_devnode; 1609 const struct device_node *ep_node, *conn_ep_dev_node; 1610 u32 phandle; 1611 int conn_ep_offset; 1612 const char *route_sub_path, *path; 1613 1614 /* Don't go further if new variant after 1615 * reading PMUGRF_SOC_CON15 1616 */ 1617 if ((readl(0xfdc20100) & GENMASK(15, 14))) 1618 return 0; 1619 1620 route_node = ofnode_path("/display-subsystem/route"); 1621 if (!ofnode_valid(route_node)) 1622 return -EINVAL; 1623 1624 ofnode_for_each_subnode(route_subnode, route_node) { 1625 if (!ofnode_is_available(route_subnode)) 1626 continue; 1627 1628 route_sub_devnode = ofnode_to_np(route_subnode); 1629 route_sub_path = route_sub_devnode->full_name; 1630 if (!strstr(ofnode_get_name(route_subnode), "dsi") && 1631 !strstr(ofnode_get_name(route_subnode), "edp")) 1632 return 0; 1633 1634 phandle = ofnode_read_u32_default(route_subnode, "connect", -1); 1635 if (phandle < 0) { 1636 printf("Warn: can't find connect node's handle\n"); 1637 continue; 1638 } 1639 1640 ep_node = of_find_node_by_phandle(phandle); 1641 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1642 printf("Warn: can't find endpoint node from phandle\n"); 1643 continue; 1644 } 1645 1646 ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle); 1647 conn_ep = ofnode_get_by_phandle(phandle); 1648 if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep)) 1649 return -ENODEV; 1650 1651 conn_port = ofnode_get_parent(conn_ep); 1652 if (!ofnode_valid(conn_port)) 1653 return -ENODEV; 1654 1655 ofnode_for_each_subnode(conn_ep, conn_port) { 1656 conn_ep_dev_node = ofnode_to_np(conn_ep); 1657 path = conn_ep_dev_node->full_name; 1658 ofnode_read_u32(conn_ep, "remote-endpoint", &phandle); 1659 conn_ep_offset = fdt_path_offset(blob, path); 1660 1661 if (!ofnode_is_available(conn_ep) && 1662 strstr(ofnode_get_name(conn_ep), "endpoint@0")) { 1663 do_fixup_by_path_u32(blob, route_sub_path, 1664 "connect", phandle, 1); 1665 fdt_status_okay(blob, conn_ep_offset); 1666 1667 } else if (ofnode_is_available(conn_ep) && 1668 strstr(ofnode_get_name(conn_ep), "endpoint@1")) { 1669 fdt_status_disabled(blob, conn_ep_offset); 1670 } 1671 } 1672 } 1673 1674 return 0; 1675 } 1676 #endif 1677 1678 static int rockchip_display_probe(struct udevice *dev) 1679 { 1680 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1681 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1682 const void *blob = gd->fdt_blob; 1683 int phandle; 1684 struct udevice *crtc_dev, *conn_dev; 1685 struct rockchip_crtc *crtc; 1686 const struct rockchip_connector *conn; 1687 struct rockchip_panel *panel = NULL; 1688 struct rockchip_bridge *bridge = NULL, *b = NULL; 1689 struct rockchip_phy *phy = NULL; 1690 struct display_state *s; 1691 const char *name; 1692 int ret; 1693 ofnode node, route_node, timing_node; 1694 struct device_node *port_node, *vop_node, *ep_node, *port_parent_node; 1695 struct public_phy_data *data; 1696 bool is_ports_node = false; 1697 1698 #if defined(CONFIG_ROCKCHIP_RK3568) 1699 rockchip_display_fixup_dts((void *)blob); 1700 #endif 1701 1702 /* Before relocation we don't need to do anything */ 1703 if (!(gd->flags & GD_FLG_RELOC)) 1704 return 0; 1705 1706 data = malloc(sizeof(struct public_phy_data)); 1707 if (!data) { 1708 printf("failed to alloc phy data\n"); 1709 return -ENOMEM; 1710 } 1711 data->phy_init = false; 1712 1713 init_display_buffer(plat->base); 1714 1715 route_node = dev_read_subnode(dev, "route"); 1716 if (!ofnode_valid(route_node)) 1717 return -ENODEV; 1718 1719 ofnode_for_each_subnode(node, route_node) { 1720 if (!ofnode_is_available(node)) 1721 continue; 1722 phandle = ofnode_read_u32_default(node, "connect", -1); 1723 if (phandle < 0) { 1724 printf("Warn: can't find connect node's handle\n"); 1725 continue; 1726 } 1727 ep_node = of_find_node_by_phandle(phandle); 1728 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1729 printf("Warn: can't find endpoint node from phandle\n"); 1730 continue; 1731 } 1732 port_node = of_get_parent(ep_node); 1733 if (!ofnode_valid(np_to_ofnode(port_node))) { 1734 printf("Warn: can't find port node from phandle\n"); 1735 continue; 1736 } 1737 1738 port_parent_node = of_get_parent(port_node); 1739 if (!ofnode_valid(np_to_ofnode(port_parent_node))) { 1740 printf("Warn: can't find port parent node from phandle\n"); 1741 continue; 1742 } 1743 1744 is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0; 1745 if (is_ports_node) { 1746 vop_node = of_get_parent(port_parent_node); 1747 if (!ofnode_valid(np_to_ofnode(vop_node))) { 1748 printf("Warn: can't find crtc node from phandle\n"); 1749 continue; 1750 } 1751 } else { 1752 vop_node = port_parent_node; 1753 } 1754 1755 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1756 np_to_ofnode(vop_node), 1757 &crtc_dev); 1758 if (ret) { 1759 printf("Warn: can't find crtc driver %d\n", ret); 1760 continue; 1761 } 1762 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1763 1764 conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node)); 1765 if (!conn_dev) { 1766 printf("Warn: can't find connect driver\n"); 1767 continue; 1768 } 1769 1770 conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev); 1771 1772 phy = rockchip_of_find_phy(conn_dev); 1773 1774 bridge = rockchip_of_find_bridge(conn_dev); 1775 if (bridge) 1776 b = bridge; 1777 while (b) { 1778 struct rockchip_bridge *next_bridge = NULL; 1779 1780 next_bridge = rockchip_of_find_bridge(b->dev); 1781 if (!next_bridge) 1782 break; 1783 1784 b->next_bridge = next_bridge; 1785 b = next_bridge; 1786 } 1787 1788 if (b) 1789 panel = rockchip_of_find_panel(b->dev); 1790 else 1791 panel = rockchip_of_find_panel(conn_dev); 1792 1793 s = malloc(sizeof(*s)); 1794 if (!s) 1795 continue; 1796 1797 memset(s, 0, sizeof(*s)); 1798 1799 INIT_LIST_HEAD(&s->head); 1800 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 1801 if (!ret) 1802 memcpy(s->ulogo_name, name, strlen(name)); 1803 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 1804 if (!ret) 1805 memcpy(s->klogo_name, name, strlen(name)); 1806 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1807 if (!strcmp(name, "fullscreen")) 1808 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1809 else 1810 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1811 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1812 if (!strcmp(name, "fullscreen")) 1813 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1814 else 1815 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1816 1817 s->force_output = ofnode_read_bool(node, "force-output"); 1818 1819 if (s->force_output) { 1820 timing_node = ofnode_find_subnode(node, "force_timing"); 1821 ret = display_get_force_timing_from_dts(timing_node, &s->force_mode); 1822 if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format)) 1823 s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24; 1824 } 1825 1826 s->blob = blob; 1827 s->panel_state.panel = panel; 1828 s->conn_state.node = conn_dev->node; 1829 s->conn_state.dev = conn_dev; 1830 s->conn_state.connector = conn; 1831 s->conn_state.phy = phy; 1832 s->conn_state.bridge = bridge; 1833 s->conn_state.overscan.left_margin = 100; 1834 s->conn_state.overscan.right_margin = 100; 1835 s->conn_state.overscan.top_margin = 100; 1836 s->conn_state.overscan.bottom_margin = 100; 1837 s->crtc_state.node = np_to_ofnode(vop_node); 1838 s->crtc_state.dev = crtc_dev; 1839 s->crtc_state.crtc = crtc; 1840 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node), is_ports_node); 1841 s->node = node; 1842 1843 if (is_ports_node) { /* only vop2 will get into here */ 1844 ofnode vp_node = np_to_ofnode(port_node); 1845 static bool get_plane_mask_from_dts; 1846 1847 s->crtc_state.ports_node = port_parent_node; 1848 if (!get_plane_mask_from_dts) { 1849 ofnode vp_sub_node; 1850 int vp_id = 0; 1851 bool vp_enable = false; 1852 1853 ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) { 1854 int cursor_plane = -1; 1855 1856 vp_id = ofnode_read_u32_default(vp_node, "reg", 0); 1857 ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0); 1858 1859 cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1); 1860 s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane; 1861 if (ret) { 1862 int primary_plane = 0; 1863 1864 s->crtc_state.crtc->vps[vp_id].plane_mask = ret; 1865 s->crtc_state.crtc->assign_plane |= true; 1866 primary_plane = ofnode_read_u32_default(vp_node, "rockchip,primary-plane", 0); 1867 printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n", 1868 vp_id, 1869 s->crtc_state.crtc->vps[vp_id].plane_mask, 1870 primary_plane, 1871 cursor_plane); 1872 } 1873 1874 /* To check current vp status */ 1875 vp_enable = false; 1876 ofnode_for_each_subnode(vp_sub_node, vp_node) 1877 vp_enable |= rockchip_get_display_path_status(vp_sub_node); 1878 s->crtc_state.crtc->vps[vp_id].enable = vp_enable; 1879 } 1880 get_plane_mask_from_dts = true; 1881 } 1882 } 1883 1884 get_crtc_mcu_mode(&s->crtc_state); 1885 1886 ret = ofnode_read_u32_default(s->crtc_state.node, 1887 "rockchip,dual-channel-swap", 0); 1888 s->crtc_state.dual_channel_swap = ret; 1889 if (connector_panel_init(s)) { 1890 printf("Warn: Failed to init panel drivers\n"); 1891 free(s); 1892 continue; 1893 } 1894 1895 if (connector_phy_init(s, data)) { 1896 printf("Warn: Failed to init phy drivers\n"); 1897 free(s); 1898 continue; 1899 } 1900 list_add_tail(&s->head, &rockchip_display_list); 1901 } 1902 1903 if (list_empty(&rockchip_display_list)) { 1904 debug("Failed to found available display route\n"); 1905 return -ENODEV; 1906 } 1907 rockchip_get_baseparameter(); 1908 display_pre_init(); 1909 1910 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 1911 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 1912 uc_priv->bpix = VIDEO_BPP32; 1913 1914 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 1915 rockchip_show_fbbase(plat->base); 1916 video_set_flush_dcache(dev, true); 1917 #endif 1918 1919 return 0; 1920 } 1921 1922 void rockchip_display_fixup(void *blob) 1923 { 1924 const struct rockchip_connector_funcs *conn_funcs; 1925 const struct rockchip_crtc_funcs *crtc_funcs; 1926 const struct rockchip_connector *conn; 1927 const struct rockchip_crtc *crtc; 1928 struct display_state *s; 1929 int offset; 1930 const struct device_node *np; 1931 const char *path; 1932 1933 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 1934 list_for_each_entry(s, &rockchip_display_list, head) 1935 load_bmp_logo(&s->logo, s->klogo_name); 1936 1937 if (!get_display_size()) 1938 return; 1939 1940 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 1941 (u64)memory_start, 1942 (u64)get_display_size()); 1943 if (offset < 0) 1944 printf("failed to reserve drm-loader-logo memory\n"); 1945 1946 offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut", 1947 (u64)cubic_lut_memory_start, 1948 (u64)get_cubic_memory_size()); 1949 if (offset < 0) 1950 printf("failed to reserve drm-cubic-lut memory\n"); 1951 } else { 1952 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 1953 /* Compatible with rkfb display, only need reserve memory */ 1954 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 1955 (u64)memory_start, 1956 MEMORY_POOL_SIZE); 1957 if (offset < 0) 1958 printf("failed to reserve fb-loader-logo memory\n"); 1959 else 1960 list_for_each_entry(s, &rockchip_display_list, head) 1961 load_kernel_bmp_logo(&s->logo, s->klogo_name); 1962 return; 1963 } 1964 1965 list_for_each_entry(s, &rockchip_display_list, head) { 1966 conn = s->conn_state.connector; 1967 if (!conn) 1968 continue; 1969 conn_funcs = conn->funcs; 1970 if (!conn_funcs) { 1971 printf("failed to get exist connector\n"); 1972 continue; 1973 } 1974 1975 crtc = s->crtc_state.crtc; 1976 if (!crtc) 1977 continue; 1978 1979 crtc_funcs = crtc->funcs; 1980 if (!crtc_funcs) { 1981 printf("failed to get exist crtc\n"); 1982 continue; 1983 } 1984 1985 if (crtc_funcs->fixup_dts) 1986 crtc_funcs->fixup_dts(s, blob); 1987 1988 if (conn_funcs->fixup_dts) 1989 conn_funcs->fixup_dts(s, blob); 1990 1991 np = ofnode_to_np(s->node); 1992 path = np->full_name; 1993 fdt_increase_size(blob, 0x400); 1994 #define FDT_SET_U32(name, val) \ 1995 do_fixup_by_path_u32(blob, path, name, val, 1); 1996 1997 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 1998 - memory_start; 1999 FDT_SET_U32("logo,offset", offset); 2000 FDT_SET_U32("logo,width", s->logo.width); 2001 FDT_SET_U32("logo,height", s->logo.height); 2002 FDT_SET_U32("logo,bpp", s->logo.bpp); 2003 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 2004 FDT_SET_U32("video,clock", s->conn_state.mode.clock); 2005 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 2006 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 2007 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 2008 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 2009 FDT_SET_U32("video,vrefresh", 2010 drm_mode_vrefresh(&s->conn_state.mode)); 2011 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 2012 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 2013 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 2014 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 2015 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 2016 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 2017 2018 if (s->conn_state.disp_info) { 2019 FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness); 2020 FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast); 2021 FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation); 2022 FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue); 2023 } 2024 2025 if (s->conn_state.disp_info->cubic_lut_data.size && 2026 CONFIG_ROCKCHIP_CUBIC_LUT_SIZE) 2027 FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id)); 2028 2029 #undef FDT_SET_U32 2030 } 2031 } 2032 2033 int rockchip_display_bind(struct udevice *dev) 2034 { 2035 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 2036 2037 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 2038 2039 return 0; 2040 } 2041 2042 static const struct udevice_id rockchip_display_ids[] = { 2043 { .compatible = "rockchip,display-subsystem" }, 2044 { } 2045 }; 2046 2047 U_BOOT_DRIVER(rockchip_display) = { 2048 .name = "rockchip_display", 2049 .id = UCLASS_VIDEO, 2050 .of_match = rockchip_display_ids, 2051 .bind = rockchip_display_bind, 2052 .probe = rockchip_display_probe, 2053 }; 2054 2055 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 2056 char *const argv[]) 2057 { 2058 if (argc != 1) 2059 return CMD_RET_USAGE; 2060 2061 rockchip_show_logo(); 2062 2063 return 0; 2064 } 2065 2066 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 2067 char *const argv[]) 2068 { 2069 if (argc != 2) 2070 return CMD_RET_USAGE; 2071 2072 rockchip_show_bmp(argv[1]); 2073 2074 return 0; 2075 } 2076 2077 U_BOOT_CMD( 2078 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 2079 "load and display log from resource partition", 2080 NULL 2081 ); 2082 2083 U_BOOT_CMD( 2084 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 2085 "load and display bmp from resource partition", 2086 " <bmp_name>" 2087 ); 2088