usb: ehci: Move cache invalidation to poll_int_queue

Preperation patch to use poll_int_queue outside of ehci-hcd.c .

Signed-off-by: Hans de Goede <hdegoede@redhat.com>

usb: ehci: Move interrupt packet length check to create_int_queue

Preperation patch to use create_int_queue outside of ehci-hcd.c .

Signed-off-by: Hans de Goede <hdegoede@redhat.com>

usb: ehci: Do not disable an already disabled periodic schedule

When periodic_schedules == 0, the schedule is disabled and there is no reason
to disable it again.

Signed-off-by: Hans de Goede <hdeg

usb: ehci: Do not disable an already disabled periodic schedule

When periodic_schedules == 0, the schedule is disabled and there is no reason
to disable it again.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>

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Merge branch 'master' of git://git.denx.de/u-boot-ti

Merge branch 'master' of git://git.denx.de/u-boot-usb

ehci-hcd.c: make local functions static

Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>

usb: use __weak

Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>

keystone: usb: add support of usb xhci

Add support of usb xhci. xHCI controls all USB speeds of the Host
mode, that is, the SS through the SS PHY, as well as the HS, FS, and
LS through the USB2 PHY.

keystone: usb: add support of usb xhci

Add support of usb xhci. xHCI controls all USB speeds of the Host
mode, that is, the SS through the SS PHY, as well as the HS, FS, and
LS through the USB2 PHY. xHCI replaces and supersedes all previous
host HCIs (HS-only EHCI, FS/LS OHCI and UHCI), and is therefore not
backwards compatible with any of them. The USB3SS’s USB Controller is
fully compliant with xHC.

Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>

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arm: marvell: Move arch/kirkwood.h to arch/soc.h

This move makes is possible to use this header not only from kirkwood
platforms but from all Marvell mvebu platforms.

Signed-off-by: Stefan Roese <s

arm: marvell: Move arch/kirkwood.h to arch/soc.h

This move makes is possible to use this header not only from kirkwood
platforms but from all Marvell mvebu platforms.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Luka Perkov <luka@openwrt.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>

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usb: dwc2: Add driver for Synopsis DWC2 USB IP block

This is the USB host controller used on the Altera SoCFPGA and Raspbery Pi.

This code has three checkpatch warnings, but to make sure it stays a

usb: dwc2: Add driver for Synopsis DWC2 USB IP block

This is the USB host controller used on the Altera SoCFPGA and Raspbery Pi.

This code has three checkpatch warnings, but to make sure it stays at least
readable and clear, these are not fixed. These bugs are in the USB request
handling combinatorial logic, so any abstracting of those is out of question.

Tested on DENX MCV (Altera SoCFPGA 5CSFXC6C6U23C8N) and RPi B+ (BCM2835).

Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Cc: Vince Bridgers <vbridger@altera.com>
Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com>

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Merge branch 'u-boot/master' into 'u-boot-arm/master'

usb: tegra: ULPI regression on tegra20

Trying to enumerate USB devices connected via ULPI to T20 failed as
follows:

USB2: ULPI integrity check failed

Git bisecting revealed the following commit

usb: tegra: ULPI regression on tegra20

Trying to enumerate USB devices connected via ULPI to T20 failed as
follows:

USB2: ULPI integrity check failed

Git bisecting revealed the following commit being at odds:

commit 2d34151f7501ddaa599897f0d89ad576126b03eb
usb: tegra: refactor PHY type selection

Looking at above commit one quickly identifies a copy paste error which
this patch fixes. Happy ULPIing again (;-p).

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>

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usb: ehci: Make periodic_schedules a per controller variable

Periodic schedules tracks how many int_queue-s are active, and decides whether
or not to en/disable the periodic schedule based on this.

usb: ehci: Make periodic_schedules a per controller variable

Periodic schedules tracks how many int_queue-s are active, and decides whether
or not to en/disable the periodic schedule based on this. This is clearly
a per controller thing.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>

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usb: ehci: poll_int_queue check real qtd, not the overlay

When we first start an int queue, the qh's overlay area is all zeros. This
gets filled by the hc with the actual qtd values as soon as it ad

usb: ehci: poll_int_queue check real qtd, not the overlay

When we first start an int queue, the qh's overlay area is all zeros. This
gets filled by the hc with the actual qtd values as soon as it advances
the queue, but we may call poll_int_queue before then, in which case we
would think the transfer has completed as the hc has not yet copied the
qt_token to the overlay, so the active flag is not set.

This fixes this by checking the actual qtd token, rather then the overlay.
This also fixes a (theoretical) race where we see the completion in the
overlay and free and re-use the qtd before the hc has completed writing back
the overlay to the actual qtd.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>

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usb: ehci: Add missing cache flush to destroy_int_queue

Signed-off-by: Hans de Goede <hdegoede@redhat.com>

usb: ehci: Properly set hub devnum and portnr with usb-1 hubs in the chain

For full / low speed devices we need to get the devnum and portnr of the tt,
so of the first upstream usb-2 hub, not of the

usb: ehci: Properly set hub devnum and portnr with usb-1 hubs in the chain

For full / low speed devices we need to get the devnum and portnr of the tt,
so of the first upstream usb-2 hub, not of the parent device (which may be a
usb-1 hub).

Signed-off-by: Hans de Goede <hdegoede@redhat.com>

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usb: ehci-mx6: Rename the USB register base address

The mx6sl/mx6sx has 2 OTG and 1 host. So they have name
"USBO2H_USB_BASE_ADDR" in imx-regs.h. The driver hard codes
the USB base address name to "

usb: ehci-mx6: Rename the USB register base address

The mx6sl/mx6sx has 2 OTG and 1 host. So they have name
"USBO2H_USB_BASE_ADDR" in imx-regs.h. The driver hard codes
the USB base address name to "USBOH3", which causes the driver
failed to build for mx6sl/mx6sx.

This patch uniform the address name to "USB_BASE_ADDR" for all
mx6 series.

Signed-off-by: Ye.Li <B37916@freescale.com>

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usb: ehci: mxs: Add board-specific callbacks

Add board-specific callbacks for enabling/disabling port power
into the MXS EHCI controller driver. This is in-line with the
names of callbacks on other

usb: ehci: mxs: Add board-specific callbacks

Add board-specific callbacks for enabling/disabling port power
into the MXS EHCI controller driver. This is in-line with the
names of callbacks on other systems.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

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USB: ehci-atmel: use pcr to enable or disable clock

If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off

USB: ehci-atmel: use pcr to enable or disable clock

If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

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USB: ohci-at91: use pcr to enable or disable clock

If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-

USB: ohci-at91: use pcr to enable or disable clock

If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

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