| 96d8284b | 31-Jul-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: add CONFIG_USB_UHCI_HCD in Kconfig
There is no UHCI driver entry in Kconfig for now, but we have some
UHCI drivers, for example, LEON. This is a placeholder in case we
want to move them to Kco
usb: add CONFIG_USB_UHCI_HCD in Kconfig
There is no UHCI driver entry in Kconfig for now, but we have some
UHCI drivers, for example, LEON. This is a placeholder in case we
want to move them to Kconfig in the future.
The help message was copied from Linux.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 93cb8247 | 31-Jul-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: add CONFIG_USB_OHCI_HCD in Kconfig
Add this option as a common config for all OHCI controllers. Its
help message was copied from Linux. Also, I moved it below EHCI
to respect the order in Lin
usb: add CONFIG_USB_OHCI_HCD in Kconfig
Add this option as a common config for all OHCI controllers. Its
help message was copied from Linux. Also, I moved it below EHCI
to respect the order in Linux's Kconfig.
Add CONFIG_USB_OHCI_HCD=y to axs103_defconfig, which is the only
user of OHCI_GENERIC.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| c4483093 | 13-Jul-2016 |
Stefan Agner <stefan.agner@toradex.com> |
usb: ehci-mx6: introduce config for high active power pin
Add a new config CONFIG_MXC_USB_OTG_HACTIVE which configures the
OTG Power Pin to be high active. Low active is the reset value
of the affec
usb: ehci-mx6: introduce config for high active power pin
Add a new config CONFIG_MXC_USB_OTG_HACTIVE which configures the
OTG Power Pin to be high active. Low active is the reset value
of the affected configuration register, hence the config option
is named by the non-reset configuration.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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| 9a88180b | 13-Jul-2016 |
Stefan Agner <stefan.agner@toradex.com> |
usb: ehci-mx6: configure power polarity in usb_power_config
USBNC_n_CTRL1 bit 9 actually controls the power pin polarity.
Rename UCTRL_PM to align reference manual and set the bit in
the appropriate
usb: ehci-mx6: configure power polarity in usb_power_config
USBNC_n_CTRL1 bit 9 actually controls the power pin polarity.
Rename UCTRL_PM to align reference manual and set the bit in
the appropriate callback usb_power_config.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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| 57de41e9 | 20-Jun-2016 |
Peng Fan <van.freenix@gmail.com> |
ehci: mx7: fix otg id detection
The USBNC_PHYCFG2_ACAENB bit should be cleared to enable the
OTG ID detection, not set it. When the bit is set, the ACA
Resistance Detection is enabled, which disable
ehci: mx7: fix otg id detection
The USBNC_PHYCFG2_ACAENB bit should be cleared to enable the
OTG ID detection, not set it. When the bit is set, the ACA
Resistance Detection is enabled, which disables the OTG ID
detection, because the internal pull up is off.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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| 429ff447 | 20-Jun-2016 |
Peng Fan <van.freenix@gmail.com> |
ehci: mx7: fix usbnc_regs
There is a 4 bytes hole between phy_cfg2 and phy_status, fix the
usbnc_regs structure to include the hole.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <pe
ehci: mx7: fix usbnc_regs
There is a 4 bytes hole between phy_cfg2 and phy_status, fix the
usbnc_regs structure to include the hole.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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| 1e6fb0e3 | 15-Jun-2016 |
Peng Fan <van.freenix@gmail.com> |
usb: ehci: only shutdown opened controller
If the usb controller is not running, no need to shutdown it,
otherwise `usb stop` complains about:
"EHCI failed to shut down host controller".
To i.MX7D
usb: ehci: only shutdown opened controller
If the usb controller is not running, no need to shutdown it,
otherwise `usb stop` complains about:
"EHCI failed to shut down host controller".
To i.MX7D SDB, there are two usb ports, one Host, one OTG.
If we only plug one udisk to the Host port and then `usb start`,
the OTG controller for OTG port does not run actually. Then,
if `usb stop`, the OTG controller for OTG port will also be
shutdown, but it is not running.
This patch adds a check to only shutdown the running controller.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: "Stefan Brüns" <stefan.bruens@rwth-aachen.de>
Cc: Stephen Warren <swarren@nvidia.com>
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| 2bf352f0 | 06-May-2016 |
Stefan Roese <sr@denx.de> |
usb: dwc2: Add delay to fix the USB detection problem on SoCFPGA
With patch c998da0d (usb: Change power-on / scanning timeout handling),
the USB scanning is started earlier and with a smaller timeou
usb: dwc2: Add delay to fix the USB detection problem on SoCFPGA
With patch c998da0d (usb: Change power-on / scanning timeout handling),
the USB scanning is started earlier and with a smaller timeout. This
resulted on SoCFPGA (using the DWC2 driver) in some USB sticks not
getting detected any more. This patch now adds a 1 second delay (in
the host mode only) to the DWC2 driver before the scanning is started.
With this delay, now all problematic USB keys are detected successfully
again. And there is no need any more to change the delay / timeout
in the common USB code (usb_hub.c).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marek Vasut <marex@denx.de>
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| e96e064f | 26-Apr-2016 |
Marek Vasut <marex@denx.de> |
usb: dwc2: Init desc_before_addr
Initialize desc_before_addr, otherwise the USB core won't send the
first 64B Get Device Descriptor request in common/usb.c function
usb_setup_descriptor() . There ar
usb: dwc2: Init desc_before_addr
Initialize desc_before_addr, otherwise the USB core won't send the
first 64B Get Device Descriptor request in common/usb.c function
usb_setup_descriptor() . There are some USB devices which expect
this sequence and otherwise can misbehave.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Tom Rini <trini@konsulko.com>
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| b4fbd089 | 27-Apr-2016 |
Marek Vasut <marex@denx.de> |
usb: dwc2: Make OC protection configurable
Introduce a new flag in the controller private data, which allows selectively
disabling the OC protection. Use the standard 'disable-over-current' OF prop
usb: dwc2: Make OC protection configurable
Introduce a new flag in the controller private data, which allows selectively
disabling the OC protection. Use the standard 'disable-over-current' OF prop
to set this flag. This OC protection must be disabled on EBV SoCrates rev 1.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
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| 618da563 | 27-Apr-2016 |
Marek Vasut <marex@denx.de> |
usb: dwc2: Pull Ext VBUS macro from dwc_otg_core_init()
Introduce a boolean flag in the dwc2 controller private data and set
it according to the macro (for now) instead of having this macro
directly
usb: dwc2: Pull Ext VBUS macro from dwc_otg_core_init()
Introduce a boolean flag in the dwc2 controller private data and set
it according to the macro (for now) instead of having this macro
directly in the dwc_otg_core_init(). This will let us configure the
flag from DT or such later on, if needed.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
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