| #
b4c3e780 |
| 05-Jul-2023 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: spi-nor-core: Add DTR protocol
Change-Id: I73a803270a5a1856371d6894d243e9e5878a9067 Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
305d7e6e |
| 05-Dec-2019 |
Vignesh Raghavendra <vigneshr@ti.com> |
UPSTREAM: mtd: spi-nor-core: Add octal mode support
Add support for Octal flash devices. Octal flash devices use 8 IO lines for data transfer. Currently only 1-1-8 Octal Read mode is supported.
Sig
UPSTREAM: mtd: spi-nor-core: Add octal mode support
Add support for Octal flash devices. Octal flash devices use 8 IO lines for data transfer. Currently only 1-1-8 Octal Read mode is supported.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> (cherry picked from commit 658df8bd946493e7fa7b0048a3a9bd658a1f4518) Change-Id: I1fabb494a963ceccb873c8a04fc3241eddd65069 Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
4b522e90 |
| 09-Sep-2019 |
Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> |
UPSTREAM: mtd: spi-nor: add missing SST26* flash IC protection ops
Commit c4e8862308d4 (mtd: spi: Switch to new SPI NOR framework) performs switch from previous 'spi_flash' infrastructure without pr
UPSTREAM: mtd: spi-nor: add missing SST26* flash IC protection ops
Commit c4e8862308d4 (mtd: spi: Switch to new SPI NOR framework) performs switch from previous 'spi_flash' infrastructure without proper testing/investigations which results in a regressions for SST26 flash series.
Add missing SST26* flash IC protection ops which were introduced previously by Commit 3d4fed87a5fa (mtd: sf: Add support of sst26wf* flash ICs protection ops)
Change-Id: I4944e5680fb58c0a2fd2f38a6477acab24536928 Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit e0cacdcc0a479dc70d3048ee40705478dce2655e)
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| #
847bb8f5 |
| 22-Jul-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
UPSTREAM: mtd: spi: Drop sf.c
spi_write_then_read, will manage to do the respective spi_xfer based on the tx_buf, rx_buf so drop the legacy spi_flash_read/write/cm code.
Tested-by: Adam Ford <aford
UPSTREAM: mtd: spi: Drop sf.c
spi_write_then_read, will manage to do the respective spi_xfer based on the tx_buf, rx_buf so drop the legacy spi_flash_read/write/cm code.
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> (cherry picked from commit 210d8ad0fa6c63e5775662b840b8eb095a69db19) Change-Id: I026abea600c7c95d3a2681e1005f1e9bd4ceda89 Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
da748245 |
| 05-Feb-2019 |
Vignesh R <vigneshr@ti.com> |
UPSTREAM: mtd: spi: Add lightweight SPI flash stack for SPL
Add a tiny SPI flash stack that just supports reading data/images from SPI flash. This is useful for boards that have SPL size constraints
UPSTREAM: mtd: spi: Add lightweight SPI flash stack for SPL
Add a tiny SPI flash stack that just supports reading data/images from SPI flash. This is useful for boards that have SPL size constraints and would need to use SPI flash framework just to read images/data from flash. There is approximately 1.5 to 2KB savings with this.
Based on prior work of reducing spi flash id table by Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Change-Id: I9b87d3ed4a01d2ce31eee327b67689e5e2ecff57 Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 778572d7cb1e2df678340fda9b081e4f7bd6c4b3)
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| #
f2313133 |
| 05-Feb-2019 |
Vignesh R <vigneshr@ti.com> |
UPSTREAM: mtd: spi: Switch to new SPI NOR framework
Switch spi_flash_* interfaces to call into new SPI NOR framework via MTD layer. Fix up sf_dataflash to work in legacy way. And update sandbox to u
UPSTREAM: mtd: spi: Switch to new SPI NOR framework
Switch spi_flash_* interfaces to call into new SPI NOR framework via MTD layer. Fix up sf_dataflash to work in legacy way. And update sandbox to use new interfaces/definitions
Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed Change-Id: I4c459ebdff8b2aec38623f27d0ba630c6c6f1ca3 Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit c4e8862308d420e85c227498797c32410d9e47a8)
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| #
b6e92505 |
| 06-Nov-2018 |
Simon Glass <sjg@chromium.org> |
UPSTREAM: sf: Add a method to obtain the block-protect setting
It is useful to obtain the block-protect setting of the SPI flash, so we know whether it is fully open or (perhaps partially) write-pro
UPSTREAM: sf: Add a method to obtain the block-protect setting
It is useful to obtain the block-protect setting of the SPI flash, so we know whether it is fully open or (perhaps partially) write-protected. Add a method for this. Update the sandbox driver to process this operation and add a test.
Signed-off-by: Simon Glass <sjg@chromium.org Change-Id: I8e8abe197ab483a26622f02666cc234a1544e642 Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit a58986ca8b53d8c7a441397082f84edc7f47d19f)
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| #
570e8d64 |
| 25-Sep-2018 |
Ashish Kumar <Ashish.Kumar@nxp.com> |
UPSTREAM: sf: Add MICRON manufacturer id
NOR flash name MT35X_QLKA and MT25Q_** used on NXP board has manufacturer id as 0x2C, which are rather for newer flashes after the split of Micron from ST.
UPSTREAM: sf: Add MICRON manufacturer id
NOR flash name MT35X_QLKA and MT25Q_** used on NXP board has manufacturer id as 0x2C, which are rather for newer flashes after the split of Micron from ST.
So macro for this micron manufacturer id.
Change-Id: Ib32d4350646f2d2946fee85dd59e55a72a55627f Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com> Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> [jagan: updated commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 5c391486b411025785e064f160d248bef31b3d28)
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| #
58a870a7 |
| 10-Apr-2018 |
Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> |
UPSTREAM: mtd: sf: Add support of sst26wf* flash ICs protection ops
sst26wf flash series block protection implementation differs from other SST series, so add specific implementation flash_lock/flas
UPSTREAM: mtd: sf: Add support of sst26wf* flash ICs protection ops
sst26wf flash series block protection implementation differs from other SST series, so add specific implementation flash_lock/flash_unlock/flash_is_locked functions for sst26wf flash ICs.
Change-Id: Id4228dde75de212d7b29dc2a621f64805fed5b48 Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 3d4fed87a5fa3ffedf64ff2811cd95c5ac4503ac)
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| #
6f775b34 |
| 08-Aug-2017 |
Andy Yan <andy.yan@rock-chips.com> |
sf: add support for GD25Q256
Add support for GD25Q256, a 32MiB SPI Nor flash from Gigadevice.
Change-Id: Id28c00189058971580406270e708a126c94c0461 Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
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| #
0b4bc1b3 |
| 16-Dec-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
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| #
9bcb0188 |
| 15-Dec-2016 |
Cyrille Pitchen <cyrille.pitchen@atmel.com> |
Revert "sf: Fix quad bit set for micron devices"
This reverts commit c56ae7519f141523ba1248b22b5b5169b21772fe.
Once the 'Quad Enable' bit is cleared in their Enhanced Volatile Configuration Registe
Revert "sf: Fix quad bit set for micron devices"
This reverts commit c56ae7519f141523ba1248b22b5b5169b21772fe.
Once the 'Quad Enable' bit is cleared in their Enhanced Volatile Configuration Register (EVCR), Micron memories expect ALL commands to use the SPI 4-4-4 protocol. Commands using SPI 1-y-z protocols are no longer accepted.
Within the reverted commit, the write_evcr() function is implemented using the spi_flash_write_common(), which is a shortcut for the [ spi_flash_cmd_write_enable(), spi_flash_cmd_write(), spi_flash_cmd_wait_ready() ] sequence.
Since the internal state of the Micron memory has been changed when the spi_flash_cmd_write() function completes, the later call of the spi_flash_cmd_wait_ready() function fails.
Indeed the SPI controller driver is not aware of the SPI protocol switch.
Further patches will fix the support of Micron QSPI memories.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> [Rebase on master, use JEDEC_MFR(info) in place of idcode0] Signed-off-by: Jagan Teki <jagan@openedev.com>
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| #
2d221489 |
| 29-Nov-2016 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
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| #
081abb13 |
| 22-Nov-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
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| #
20343ff3 |
| 30-Oct-2016 |
Jagan Teki <jagan@openedev.com> |
spi: Remove dual flash options/flags
Dual flash code in spi are usually take the spi controller to work with dual connected flash devices. Usually these dual connection operation's are referred to f
spi: Remove dual flash options/flags
Dual flash code in spi are usually take the spi controller to work with dual connected flash devices. Usually these dual connection operation's are referred to flash controller protocol rather with spi controller protocol, these are still present in flash side for the usage of spi-nor controllers.
So, this patch remove the dual_flash options or flags in sf which are triggered from spi controller side.
Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
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| #
7b4ab88e |
| 30-Oct-2016 |
Jagan Teki <jagan@openedev.com> |
sf: Rename few local functions
spi_flash_write_bar-> write_bar spi_flash_write_bar -> read_bar spi_flash_cmd_wait_ready -> spi_flash_wait_till_ready
Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <
sf: Rename few local functions
spi_flash_write_bar-> write_bar spi_flash_write_bar -> read_bar spi_flash_cmd_wait_ready -> spi_flash_wait_till_ready
Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
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| #
116e005c |
| 15-Nov-2016 |
Jagan Teki <jagan@amarulasolutions.com> |
sf: Remove spansion_s25fss_disable_4KB_erase
In spansion S25FS-S family the physical sectors are grouped as normal and parameter sectors. Parameter sectors are 4kB in size with 8 set located at the
sf: Remove spansion_s25fss_disable_4KB_erase
In spansion S25FS-S family the physical sectors are grouped as normal and parameter sectors. Parameter sectors are 4kB in size with 8 set located at the bottom or top address of a device. Normal sectors are similar to other flash family with sizes of 64kB or 32 kB.
To erase whole flash using sector erase(D8h or DCh) won't effect the parameter sectors, so in order to erase these we must use 4K sector erase commands (20h or 21h) separately.
So better to erase the whole flash using 4K sector erase instead of detecting these family parts again and do two different erase operations.
For this: - Removed spansion_s25fss_disable_4KB_erase code - Add SECT_4K for S25FS512S chip
Cc: Yunhui Cui <yunhui.cui@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com>
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| #
0bdb7cb9 |
| 30-Oct-2016 |
Jagan Teki <jagan@openedev.com> |
sf: Increase max id length by 1 byte
So, now SPI_FLASH_ID_MAX_LEN is 6 bytes useful for few spansion flash families S25FS-S
Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vig
sf: Increase max id length by 1 byte
So, now SPI_FLASH_ID_MAX_LEN is 6 bytes useful for few spansion flash families S25FS-S
Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
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| #
ed363b53 |
| 30-Oct-2016 |
Jagan Teki <jagan@openedev.com> |
sf: Add SPI_FLASH_MAX_ID_LEN
Add id length of 5 bytes numerical value to macro.
Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <
sf: Add SPI_FLASH_MAX_ID_LEN
Add id length of 5 bytes numerical value to macro.
Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com>
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| #
eccb6be0 |
| 30-Oct-2016 |
Jagan Teki <jagan@openedev.com> |
sf: nr_sectors -> n_sectors
Rename nr_sectors as n_sectors to sync with Linux.
Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <m
sf: nr_sectors -> n_sectors
Rename nr_sectors as n_sectors to sync with Linux.
Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
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| #
f3bf2e5a |
| 30-Oct-2016 |
Jagan Teki <jagan@openedev.com> |
sf: Cleanup spi_flash_info{}
- Proper tabs spaces - Removed unnecessary - Add comments in spi_flash_info members - Add comments for spi_flash_info.flags
Cc: Simon Glass <sjg@chromium.org> Cc: Bin M
sf: Cleanup spi_flash_info{}
- Proper tabs spaces - Removed unnecessary - Add comments in spi_flash_info members - Add comments for spi_flash_info.flags
Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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| #
f790ca7c |
| 30-Oct-2016 |
Jagan Teki <jagan@openedev.com> |
sf: Adopt flash table INFO macro from Linux
INFO macro make flash table entries more adjustable like adding new flash_info attributes, update ID length bytes and so on and more over it will sync to
sf: Adopt flash table INFO macro from Linux
INFO macro make flash table entries more adjustable like adding new flash_info attributes, update ID length bytes and so on and more over it will sync to Linux way of defining flash_info attributes.
- Add JEDEC_ID - Add JEDEC_EXT macro - Add JEDEC_MFR - spi_flash_params => spi_flash_info - params => info
Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
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| #
19d051a2 |
| 22-Sep-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
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| #
3632c8e5 |
| 08-Aug-2016 |
Jagan Teki <jteki@openedev.com> |
sf: Move flags macro's to spi_flash_params{} members
This patch moves flags macro's to respective member position on spi_flash_params{}, for better readabilty and finding the respective member macro
sf: Move flags macro's to spi_flash_params{} members
This patch moves flags macro's to respective member position on spi_flash_params{}, for better readabilty and finding the respective member macro's easily.
Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
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| #
de059928 |
| 08-Aug-2016 |
Jagan Teki <jteki@openedev.com> |
sf: Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash
Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash code from header file.
Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc:
sf: Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash
Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash code from header file.
Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
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