1 /* 2 * SPI flash internal definitions 3 * 4 * Copyright (C) 2008 Atmel Corporation 5 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef _SF_INTERNAL_H_ 11 #define _SF_INTERNAL_H_ 12 13 #include <linux/types.h> 14 #include <linux/compiler.h> 15 16 #define SPI_NOR_MAX_ID_LEN 6 17 #define SPI_NOR_MAX_ADDR_WIDTH 4 18 19 struct flash_info { 20 char *name; 21 22 /* 23 * This array stores the ID bytes. 24 * The first three bytes are the JEDIC ID. 25 * JEDEC ID zero means "no ID" (mostly older chips). 26 */ 27 u8 id[SPI_NOR_MAX_ID_LEN]; 28 u8 id_len; 29 30 /* The size listed here is what works with SPINOR_OP_SE, which isn't 31 * necessarily called a "sector" by the vendor. 32 */ 33 unsigned int sector_size; 34 u16 n_sectors; 35 36 u16 page_size; 37 u16 addr_width; 38 39 u16 flags; 40 #define SECT_4K BIT(0) /* SPINOR_OP_BE_4K works uniformly */ 41 #define SPI_NOR_NO_ERASE BIT(1) /* No erase command needed */ 42 #define SST_WRITE BIT(2) /* use SST byte programming */ 43 #define SPI_NOR_NO_FR BIT(3) /* Can't do fastread */ 44 #define SECT_4K_PMC BIT(4) /* SPINOR_OP_BE_4K_PMC works uniformly */ 45 #define SPI_NOR_DUAL_READ BIT(5) /* Flash supports Dual Read */ 46 #define SPI_NOR_QUAD_READ BIT(6) /* Flash supports Quad Read */ 47 #define USE_FSR BIT(7) /* use flag status register */ 48 #define SPI_NOR_HAS_LOCK BIT(8) /* Flash supports lock/unlock via SR */ 49 #define SPI_NOR_HAS_TB BIT(9) /* 50 * Flash SR has Top/Bottom (TB) protect 51 * bit. Must be used with 52 * SPI_NOR_HAS_LOCK. 53 */ 54 #define SPI_S3AN BIT(10) /* 55 * Xilinx Spartan 3AN In-System Flash 56 * (MFR cannot be used for probing 57 * because it has the same value as 58 * ATMEL flashes) 59 */ 60 #define SPI_NOR_4B_OPCODES BIT(11) /* 61 * Use dedicated 4byte address op codes 62 * to support memory size above 128Mib. 63 */ 64 #define NO_CHIP_ERASE BIT(12) /* Chip does not support chip erase */ 65 #define SPI_NOR_SKIP_SFDP BIT(13) /* Skip parsing of SFDP tables */ 66 #define USE_CLSR BIT(14) /* use CLSR command */ 67 }; 68 69 extern const struct flash_info spi_nor_ids[]; 70 71 #define JEDEC_MFR(info) ((info)->id[0]) 72 #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) 73 74 /* Send a single-byte command to the device and read the response */ 75 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); 76 77 /* 78 * Send a multi-byte command to the device and read the response. Used 79 * for flash array reads, etc. 80 */ 81 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd, 82 size_t cmd_len, void *data, size_t data_len); 83 84 /* 85 * Send a multi-byte command to the device followed by (optional) 86 * data. Used for programming the flash array, etc. 87 */ 88 int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, 89 const void *data, size_t data_len); 90 91 92 /* Get software write-protect value (BP bits) */ 93 int spi_flash_cmd_get_sw_write_prot(struct spi_flash *flash); 94 95 96 #ifdef CONFIG_SPI_FLASH_MTD 97 int spi_flash_mtd_register(struct spi_flash *flash); 98 void spi_flash_mtd_unregister(void); 99 #endif 100 #endif /* _SF_INTERNAL_H_ */ 101