UPSTREAM: mtd: nand: Pass the CS line to ->setup_data_interface()

Some NAND controllers can assign different NAND timings to different
CS lines. Pass the CS line information to ->setup_data_interfac

UPSTREAM: mtd: nand: Pass the CS line to ->setup_data_interface()

Some NAND controllers can assign different NAND timings to different
CS lines. Pass the CS line information to ->setup_data_interface() so
that the NAND controller driver knows which CS line is concerned by
the setup_data_interface() request.

Change-Id: I752cbd4374e56b0370bdbfa3ecb207f6ec1f5145
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 104e442a67cfba4d0cc982384761befb917fb6a1]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 52cde35b9645e60a0c8e4040136476c4f9804110)

show more ...

UPSTREAM: mtd: nand: allow drivers to request minimum alignment for passed buffer

In some cases, nand_do_{read,write}_ops is passed with unaligned
ops->datbuf. Drivers using DMA will be unhappy abo

UPSTREAM: mtd: nand: allow drivers to request minimum alignment for passed buffer

In some cases, nand_do_{read,write}_ops is passed with unaligned
ops->datbuf. Drivers using DMA will be unhappy about unaligned
buffer.

The new struct member, buf_align, represents the minimum alignment
the driver require for the buffer. If the buffer passed from the
upper MTD layer does not have enough alignment, nand_do_*_ops will
use bufpoi.

Change-Id: I83feb4e3fe7d612b3fc2ec46008f540834f2c185
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 477544c62a84d3bacd9f90ba75ffc16c04d78071]
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 436fb2b84dc24853298f1768c596f7ee02d582d7)

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UPSTREAM: mtd: nand: Wait for PAGEPROG to finish in drivers setting NAND_ECC_CUSTOM_PAGE_ACCESS

Drivers setting NAND_ECC_CUSTOM_PAGE_ACCESS are supposed to handle the
full read/write page sequence,

UPSTREAM: mtd: nand: Wait for PAGEPROG to finish in drivers setting NAND_ECC_CUSTOM_PAGE_ACCESS

Drivers setting NAND_ECC_CUSTOM_PAGE_ACCESS are supposed to handle the
full read/write page sequence, and waiting for a page to actually be
programmed is part of this write-page sequence.
This is also what is done in ->write_oob_xxx() hooks, so let's do that in
->write_page_xxx() as well to make it consistent.

Change-Id: I7e9aeeaa5e17440bcd501f48bb0f6927ff001d66
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 41145649f4acb30249b636b945053db50c9331c5]
[masahiro:
There is no driver setting NAND_ECC_CUSTOM_PAGE_ACCESS in U-Boot.
No driver is affected by this change.]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit c7c553f249f99ae282f1fa5c0e314aae0bce8a26)

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UPSTREAM: mtd: nand: Drop the ->errstat() hook

The ->errstat() hook is no longer implemented NAND controller drivers.
Get rid of it before someone starts abusing it.

Change-Id: I6920981bf0c7c0fad9b

UPSTREAM: mtd: nand: Drop the ->errstat() hook

The ->errstat() hook is no longer implemented NAND controller drivers.
Get rid of it before someone starts abusing it.

Change-Id: I6920981bf0c7c0fad9b017f83a3a075ad898d9be
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 7d135bcced20be2b50128432c5426a7278ec4f6d]
[masahiro: modify davinci_nand.c for U-Boot]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 94b50a8aae1a6e1514cb39ecb2d2aec0824582f6)

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UPSTREAM: mtd: nand: Drop unused cached programming support

Cached programming is always skipped, so drop the associated code until
we decide to really support it.

Change-Id: Ife766710fad3e88ccc2e1

UPSTREAM: mtd: nand: Drop unused cached programming support

Cached programming is always skipped, so drop the associated code until
we decide to really support it.

Change-Id: Ife766710fad3e88ccc2e156aeb7f46924c44fd2d
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 0b4773fd1649e0d418275557723a7ef54f769dc9]
[masahiro: modify davinci_nand.c for U-Boot]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 4d75596e6d27315a05253d85e870d28cda972d45)

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UPSTREAM: mtd: nand: Support controllers with custom page

If your controller already sends the required NAND commands when
reading or writing a page, then the framework is not supposed to
send READ0

UPSTREAM: mtd: nand: Support controllers with custom page

If your controller already sends the required NAND commands when
reading or writing a page, then the framework is not supposed to
send READ0 and SEQIN/PAGEPROG respectively.

Change-Id: I55b5e5f4fbe1f417b60794c234ffdb48c7900d70
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 3371d663bb4579f1b2003a92162edd6d90edd089]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 1fb87de83dd6e76307e110100f265deb2d8d8163)

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UPSTREAM: mtd: nand: Add a few more timings to nand_sdr_timings

Add the tR_max, tBERS_max, tPROG_max and tCCS_min timings to the
nand_sdr_timings struct.
Assign default/safe values for the staticall

UPSTREAM: mtd: nand: Add a few more timings to nand_sdr_timings

Add the tR_max, tBERS_max, tPROG_max and tCCS_min timings to the
nand_sdr_timings struct.
Assign default/safe values for the statically defined timings, and
extract them from the ONFI parameter table if the NAND is ONFI
compliant.

Change-Id: Id5d29cfbab072d3500f23a997e63b1ba6e5b64ff
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
[Linux commit: 204e7ecd47e26cc12d9e8e8a7e7a2eeb9573f0ba
Fixup commit: 6d29231000bbe0fb9e4893a9c68151ffdd3b5469]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 6f84b26b53afa207092a8906fa08f4c78d65afb6)

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UPSTREAM: mtd: nand: Fix data interface configuration logic

When changing from one data interface setting to another, one has to
ensure a specific sequence which is described in the ONFI spec.

One

UPSTREAM: mtd: nand: Fix data interface configuration logic

When changing from one data interface setting to another, one has to
ensure a specific sequence which is described in the ONFI spec.

One of these constraints is that the CE line has go high after a reset
before a command can be sent with the new data interface setting, which
is not guaranteed by the current implementation.

Rework the nand_reset() function and all the call sites to make sure the
CE line is asserted and released when required.

Also make sure to actually apply the new data interface setting on the
first die.

Change-Id: I5c8bd5b3342823510771c9fbb9fa637208cce037
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Fixes: d8e725dd8311 ("mtd: nand: automate NAND timings selection")
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
[Linux commit: 73f907fd5fa56b0066d199bdd7126bbd04f6cd7b]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 3d841b3214565640ada80baa0f73885cddd216be)

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UPSTREAM: mtd: nand: automate NAND timings selection

The NAND framework provides several helpers to query timing modes supported
by a NAND chip, but this implies that all NAND controller drivers hav

UPSTREAM: mtd: nand: automate NAND timings selection

The NAND framework provides several helpers to query timing modes supported
by a NAND chip, but this implies that all NAND controller drivers have
to implement the same timings selection dance. Also currently NAND
devices can be resetted at arbitrary places which also resets the timing
for ONFI chips to timing mode 0.

Provide a common logic to select the best timings based on ONFI or
->onfi_timing_mode_default information. Hook this into nand_reset()
to make sure the new timing is applied each time during a reset.

NAND controller willing to support timings adjustment should just
implement the ->setup_data_interface() method.

Change-Id: I9a70d62e3e7144d348ee98bb15cc70f2d229eb65
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[Linux commit: d8e725dd831186a3595036b2b1df9f68cbc6efa3]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 27c4792cd233ba68fa15aaa885d0f53db7b5728a)

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UPSTREAM: mtd: nand: Expose data interface for ONFI mode 0

The nand layer will need ONFI mode 0 to use it as timing mode
before and right after reset.

Change-Id: If79882c9ae5256c817f331157bf108148b

UPSTREAM: mtd: nand: Expose data interface for ONFI mode 0

The nand layer will need ONFI mode 0 to use it as timing mode
before and right after reset.

Change-Id: If79882c9ae5256c817f331157bf108148b214b39
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 6e1f9708dbf3c50a8da93c1952a01a7a2acb5e66]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit b893e83330662393ff40d4dc8cb2733599beb26a)

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UPSTREAM: mtd: nand: convert ONFI mode into data interface

struct nand_data_interface is the designated type to pass to
the NAND drivers to configure the timing. To simplify further
patches convert

UPSTREAM: mtd: nand: convert ONFI mode into data interface

struct nand_data_interface is the designated type to pass to
the NAND drivers to configure the timing. To simplify further
patches convert the onfi_sdr_timings array from type struct
nand_sdr_timings nand_data_interface.

Change-Id: I9c9422bf02986844e3f6b57381ca62ed9c5a66b7
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: b1dd3ca203fccd111926c3f6ac59bf903ec62b05]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 46deff57da190fee1a902ecfbf951cd4cfe8494e)

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UPSTREAM: mtd: nand: Create a NAND reset function

When NAND devices are resetted some initialization may have to be done,
like for example they have to be configured for the timing mode that
shall b

UPSTREAM: mtd: nand: Create a NAND reset function

When NAND devices are resetted some initialization may have to be done,
like for example they have to be configured for the timing mode that
shall be used. To get a common place where this initialization can be
implemented create a nand_reset() function. This currently only issues
a NAND_CMD_RESET to the NAND device. The places issuing this command
manually are replaced with a call to nand_reset().

Change-Id: Id5e060d521d5f7835e928633515e6f4a02ba72fa
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Linux commit: 2f94abfe35b210e7711af9202a3dcfc9e779219a]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 1728eb577dc1de459196ca45068f3feced77a198)

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UPSTREAM: mtd: nand: Add an option to maximize the ECC strength

The generic NAND DT bindings allows one to tweak the ECC strength and
step size to their need. It can be used to lower the ECC strengt

UPSTREAM: mtd: nand: Add an option to maximize the ECC strength

The generic NAND DT bindings allows one to tweak the ECC strength and
step size to their need. It can be used to lower the ECC strength to
match a bootloader/firmware config, but might also be used to get a better
reliability.

In the latter case, the user might want to use the maximum ECC strength
without having to explicitly calculate the exact value (this value not
only depends on the OOB size, but also on the NAND controller, and can
be tricky to extract).

Add a generic 'nand-ecc-maximize' DT property and the associated
NAND_ECC_MAXIMIZE flag, to let ECC controller drivers select the best
ECC strength and step-size on their own.

Change-Id: I9303c1f99c9abc0656cf25825bb2d70b40aaf00d
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
[Linux commit: ba78ee00e1ff84de9b3ad33edbd3ec599099ee82]
[masahiro: of_property_read_bool -> fdt_getprop for U-Boot]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 19d30ded88fb8b89c8426e6d95ded19ba900f314)

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UPSTREAM: mtd: nand: zynq: Add a config option to use 1st stage bootloader timing

In legacy method, 1st stage bootloader was used to configure the HW
setting such as NAND timing. Hence, adding a con

UPSTREAM: mtd: nand: zynq: Add a config option to use 1st stage bootloader timing

In legacy method, 1st stage bootloader was used to configure the HW
setting such as NAND timing. Hence, adding a config option in Zynq
NAND driver for the compatibility of device that using 1st stage
bootloder instead of U-boot SPL.

This commit is to add config option
CONFIG_NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS that allow NAND driver use
timing values set by the 1st stage bootloader, instead of the hard-coded
values in the Zynq NAND driver.

Change-Id: Ib0558453a4cdac2baf7f4441eccf6e42a0a3d175
Signed-off-by: Jeff Westfahl <jeff.westfahl@ni.com>
Signed-off-by: Wilson Lee <wilson.lee@ni.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Keng Soon Cheah <keng.soon.cheah@ni.com>
Cc: Chen Yee Chew <chen.yee.chew@ni.com>
Cc: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Scott Wood <oss@buserror.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 8000d6ea3fc99fba43e84d870632ebde3117bb35)

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UPSTREAM: omap2: nand: Make NAND_OMAP_GPMC_PREFETCH default

This option provides better performance and should really always be
enabled. Make this be default y.

Change-Id: Iecc4f7b97e6769ea01cb0a6

UPSTREAM: omap2: nand: Make NAND_OMAP_GPMC_PREFETCH default

This option provides better performance and should really always be
enabled. Make this be default y.

Change-Id: Iecc4f7b97e6769ea01cb0a69c708efc98a6ccbc3
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 39e709611df05505ada013a37c5254b4c671b847)

show more ...

UPSTREAM: mtd: nand: fsl-ifc: fix support of multiple NAND devices

Currently the chipselect used to identify the corresponding NAND chip
is stored at the controller and only set during fsl_ifc_chip_

UPSTREAM: mtd: nand: fsl-ifc: fix support of multiple NAND devices

Currently the chipselect used to identify the corresponding NAND chip
is stored at the controller and only set during fsl_ifc_chip_init().
This way, only the last NAND chip is working, as the previous value
of cs_nand gets overwritten.

In order to solve this issue the chipselect is computed on demand by
evaluating the bank variable. Thus, the correct chipselect for each
NAND chip operation is used.

Tested on hardware with two NAND chips connected to the IFC
controller.

Change-Id: I13b556b8c9364811b5fc8d6e55a0c99f373e7c05
Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de>
Acked-by: Scott Wood <oss@buserror.net>
[YS: reformatted commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 99145c488f782efd9175cec50775ea6c1023b2c2)

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UPSTREAM: mtd: replace MTDDEBUG() with pr_debug()

In old days, the MTD subsystem in Linux had debug facility like
DEBUG(MTD_DEBUG_LEVEL1, ...).

They were all replaced with pr_debug() until Linux 3.

UPSTREAM: mtd: replace MTDDEBUG() with pr_debug()

In old days, the MTD subsystem in Linux had debug facility like
DEBUG(MTD_DEBUG_LEVEL1, ...).

They were all replaced with pr_debug() until Linux 3.2. See Linux
commit 289c05222172 ("mtd: replace DEBUG() with pr_debug()").

U-Boot still uses similar macros. Covert all of them for easier sync.

Done with the help of Coccinelle.

The semantic patch I used is as follows:

// <smpl>
@@
expression e1, e2;
@@
-MTDDEBUG(e1, e2)
+pr_debug(e2)
@@
expression e1, e2;
@@
-MTDDEBUG(e1, e2,
+pr_debug(e2,
...)
// </smpl>

Change-Id: Ibacb18e06c109869fac9f6ed950d3aa2194ed7d8
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 166cae20dd797dcb25fc550269792f15704d9c58)

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UPSTREAM: Convert CONFIG_NAND_OMAP_GPMC et al and CONFIG_NAND_MXC to Kconfig

This converts the following to Kconfig:
CONFIG_NAND_MXC
CONFIG_NAND_OMAP_GPMC
CONFIG_NAND_OMAP_GPMC_PREFETCH

UPSTREAM: Convert CONFIG_NAND_OMAP_GPMC et al and CONFIG_NAND_MXC to Kconfig

This converts the following to Kconfig:
CONFIG_NAND_MXC
CONFIG_NAND_OMAP_GPMC
CONFIG_NAND_OMAP_GPMC_PREFETCH
CONFIG_NAND_OMAP_ELM
CONFIG_SPL_NAND_AM33XX_BCH
CONFIG_SPL_NAND_SIMPLE
CONFIG_SYS_NAND_BUSWIDTH_16BIT

Change-Id: Ic2238bb7ba18d9ae37dfef7ac7593fd42e34ef7d
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
[trini: Finish migration of CONFIG_SPL_NAND_SIMPLE, fix some build issues,
add CONFIG_NAND_MXC so we can do CONFIG_SYS_NAND_BUSWIDTH_16BIT]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 0a9ef45158d586017839d4b6fccd7f8f16672156)

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UPSTREAM: mtd: nand: denali_dt: add clock support

Enable clock in the probe hook. The clock rate will be necessary
when setup_data_interface hook is supported.

Change-Id: Iaeddd7e3b407d2142c65a71b

UPSTREAM: mtd: nand: denali_dt: add clock support

Enable clock in the probe hook. The clock rate will be necessary
when setup_data_interface hook is supported.

Change-Id: Iaeddd7e3b407d2142c65a71bec58c438d4baf911
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit a89b9bc0950b7dd5f43a88e211be4b2acd58dad7)

show more ...

UPSTREAM: mtd: nand: do not check R/B# for CMD_SET_FEATURES in nand_command(_lp)

Set Features (0xEF) command toggles the R/B# pin after 4 sub feature
parameters are written.

Currently, nand_command

UPSTREAM: mtd: nand: do not check R/B# for CMD_SET_FEATURES in nand_command(_lp)

Set Features (0xEF) command toggles the R/B# pin after 4 sub feature
parameters are written.

Currently, nand_command(_lp) calls chip->dev_ready immediately after
the address cycle because NAND_CMD_SET_FEATURES falls into default:
label. No wait is needed at this point.

If you see nand_onfi_set_features(), R/B# is already cared by the
chip->waitfunc call.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>

[ Linux commit: c5d664aa5a4c4b257a54eb35045031630d105f49 ]
Change-Id: Id27009bf1ccca742f36bff34dfec9a3477b5688f
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit fe3fddfad71aa228eedcc78a58b34d056724b2c9)

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UPSTREAM: mtd: nand: do not check R/B# for CMD_READID in nand_command(_lp)

Read ID (0x90) command does not toggle the R/B# pin. Without this
patch, NAND_CMD_READID falls into the default: label, th

UPSTREAM: mtd: nand: do not check R/B# for CMD_READID in nand_command(_lp)

Read ID (0x90) command does not toggle the R/B# pin. Without this
patch, NAND_CMD_READID falls into the default: label, then R/B# is
checked by chip->dev_ready().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>

[ Linux commit: 3158fa0e739615769cc047d2428f30f4c3b6640e ]

Change-Id: Id5bf75ce480c18888aeefc090af5fbb7c4ebab4b
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 6f29c7a8f1fa8abef167d9017947cf090e39d60e)

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UPSTREAM: mtd: nand: denali: allow to override corrupted revision register

The Denali IP does not update the revision register properly.
Allow to override it with SoC data associated with compatible

UPSTREAM: mtd: nand: denali: allow to override corrupted revision register

The Denali IP does not update the revision register properly.
Allow to override it with SoC data associated with compatible.

Linux had already finished big surgery of this driver, but I need
to prepare the NAND core before the full sync of the driver.
For now, I am fixing the most fatal problem on UniPhier platform.

Change-Id: I690175ba7a1f389bcbc7665cbfdd4521750cf009
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 6c71b6f45474e58cb85370951f4c144495778e0b)

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rockchip: drivers: mtd: nand: modify the bad block detection process

Change-Id: I97c99e91516f34a270684cbb77820b4078f1cf03
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

rockchip: nand: modify udevice_id to compatible with NAND driver include FTL

Modify the opensource nandc driver to compatible with
the NAND driver include FTL，which used udevice_id
"rockchip,rk-nand

rockchip: nand: modify udevice_id to compatible with NAND driver include FTL

Modify the opensource nandc driver to compatible with
the NAND driver include FTL，which used udevice_id
"rockchip,rk-nandc".

Change-Id: I8dda456aed89e15b2b9885e8d9d723f2d2e84ccb
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

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drivers: mtd: nand: rockchip: the mtd name used the same as kenrel drivers

Change-Id: Ib3c6d70896f6bb5acb3ea506d01facc5ca465ba2
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>