| 49a2ef15 | 11-Dec-2017 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
UPSTREAM: rockchip: move CONFIG_ENV_SIZE and CONFIG_ENV_OFFSET to Kconfig
This commit adds ENV_SIZE and ENV_OFFSET configuration items for ARCH_ROCKCHIP, but keeps these non-visible (i.e. not prompt
UPSTREAM: rockchip: move CONFIG_ENV_SIZE and CONFIG_ENV_OFFSET to Kconfig
This commit adds ENV_SIZE and ENV_OFFSET configuration items for ARCH_ROCKCHIP, but keeps these non-visible (i.e. not prompt is given). With these new items present, the configuration from the header files is moved to Kconfig.
Keeping these non-visible is necessary to have the possibility to select new default values if CONFIG_IS_IN_* is changed (interactively or with oldconfig). Otherwise it will always be set to a previous value if used with a prompt. As an example if we do a defconfig with CONFIG_IS_IN_MMC and change it to CONFIG_IS_IN_SPI_FLASH via menuconfig, ENV_SIZE and ENV_OFFSET will not be changed to the correct values as defconfig will already have set them to the default values of CONFIG_IS_IN_MMC in .config.
Change-Id: I72dcb184406523a3a846322fd58ee7b9669d3390 Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 81f53b0dafdfe9458f6d04fc5ec2732c2ea23a71)
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| 83c6e7de | 15-Dec-2017 |
Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> |
UPSTREAM: rockchip: rk3399-puma: set gpio4cd iodomain to 1.8V
The PCIe reset signal is connected to GPIO4_C6 on the Puma module. This pin is supplied by 1.8V, but the default iodomain setting is 3.0
UPSTREAM: rockchip: rk3399-puma: set gpio4cd iodomain to 1.8V
The PCIe reset signal is connected to GPIO4_C6 on the Puma module. This pin is supplied by 1.8V, but the default iodomain setting is 3.0V and in this situation the pin is unable to go high.
Linux assumes that this signal works in early boot as PCIe is probed before loading the iodomain driver.
Make PCIe work in Linux by setting the gpio4cd iodomain to 1.8V.
Change-Id: I131ca6147b490a89cc913ce398dc163c99efd9f2 Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit aa41220f6f7c79284ce5880e2533f81c125237a4)
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| 23429be3 | 28-Nov-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
UPSTREAM: rockchip: rk3399-puma: add code to allow forcing a power-on reset
The reset circuitry in the RK3399 only resets 'almost all logic' when a software reset is performed. To make our software
UPSTREAM: rockchip: rk3399-puma: add code to allow forcing a power-on reset
The reset circuitry in the RK3399 only resets 'almost all logic' when a software reset is performed. To make our software maintenance easier in the future, we want to have the option (controlled by a DTS property) to force all reset causes other than a power-on reset to trigger a power-on reset via a GPIO trigger.
This adds the necessary support to the rk3399-puma (i.e. RK3399-Q7) board-support and the documentation for the new property (sysreset-gpio) within the /config-node.
Change-Id: If51b78c2ef6ca929c2d108346e21697f7e9b36db Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit ae0d33a7291a164a11ae034bcf4f71226b2bef48)
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| be29fed8 | 29-Sep-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
UPSTREAM: rockchip: rk3399-puma: add boot-on regulator to override BIOS_DISABLE
The (Qseven) BIOS_DISABLE signal on the RK3399-Q7 (Puma) keeps the eMMC and SPI in reset initially and we need to writ
UPSTREAM: rockchip: rk3399-puma: add boot-on regulator to override BIOS_DISABLE
The (Qseven) BIOS_DISABLE signal on the RK3399-Q7 (Puma) keeps the eMMC and SPI in reset initially and we need to write a GPIO to turn them on before continuing the boot-up.
This adds the DTS entries for the additional regulator and makes pinctrl and gpio3 available during SPL. It also adds a hook to the spl_board_init() to ensure that the regulator gets probed and enabled.
Change-Id: I5d229af39d5b410a5abc38f9d151bc766384c275 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 482cf22333dbfb7c706d6a7ec1ffbfa5409cc6a3)
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| b4d43cb8 | 29-Sep-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
UPSTREAM: rockchip: puma-rk3399: update board_init()
The original initialisation code for board_init() was largely lifted from the code on the EVB. However, the RK3399-Q7 can do with a much more co
UPSTREAM: rockchip: puma-rk3399: update board_init()
The original initialisation code for board_init() was largely lifted from the code on the EVB. However, the RK3399-Q7 can do with a much more concise init sequence.
This cleans up the board_init() by updating it to the essentials for the RK3399-Q7 and getting rid of the accumulated cruft.
Change-Id: I7855f00a4256b246f6a082b0edf12fc776798e26 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 0b5e7aab0ef62fea852d03df76e577c217d0b8bf)
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| 4ce8b4d6 | 18-Jul-2017 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: board: puma_rk3399: rename ATF firmware
prefix the bl31 firmware needed to build uboot.itb so it can coexist in the build area with ATFs from other boards (i.e. lion_rk3368)
Signed-off-by
rockchip: board: puma_rk3399: rename ATF firmware
prefix the bl31 firmware needed to build uboot.itb so it can coexist in the build area with ATFs from other boards (i.e. lion_rk3368)
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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| 975e4aba | 23-Jun-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: correct the bank0 ram size
The bank0 ram size should be the DRAM size minus reserved size, the DRAM size may be 1GB, 2GB, 4GB, we can not hard code it.
Signed-off-by: Kever Yang <kever.ya
rockchip: correct the bank0 ram size
The bank0 ram size should be the DRAM size minus reserved size, the DRAM size may be 1GB, 2GB, 4GB, we can not hard code it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Added DECLARE_GLOBAL_DATA_PTR for RK3328, RK3368 and RK3399: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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| 8adc9d18 | 05-May-2017 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: board: puma_rk3399: derive ethaddr from cpuid
Generate a MAC address based on the cpuid available in the efuse block: Use the first 6 byte of the cpuid's SHA256 hash and set the locally ad
rockchip: board: puma_rk3399: derive ethaddr from cpuid
Generate a MAC address based on the cpuid available in the efuse block: Use the first 6 byte of the cpuid's SHA256 hash and set the locally administered bits. Also ensure that the multicast bit is cleared.
The MAC address is only generated and set if there is no ethaddr present in the saved environment.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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