History log of /rk3399_rockchip-uboot/arch/x86/cpu/ivybridge/sdram.c (Results 1 – 25 of 48)
Revision Date Author Comments
# 07d77838 01-Aug-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-x86


# 6461f45b 30-Jul-2017 xypron.glpk@gmx.de <xypron.glpk@gmx.de>

x86: ivybridge: remove unused uma_memory_size

The value of uma_memory_size depends on an undefined value
from the stack. The value of uma_memory_size is changed but
never used.

So simply remove thi

x86: ivybridge: remove unused uma_memory_size

The value of uma_memory_size depends on an undefined value
from the stack. The value of uma_memory_size is changed but
never used.

So simply remove this superfluous code.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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# 76b00aca 31-Mar-2017 Simon Glass <sjg@chromium.org>

board_f: Drop setup_dram_config() wrapper

By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.

Signed-off-by: Simon Glass <sjg@

board_f: Drop setup_dram_config() wrapper

By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

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# 8d8f3acd 16-Jan-2017 Simon Glass <sjg@chromium.org>

x86: ivybridge: Add more debugging for failures

Add various debug() messages in places where errors occur. This aids with
debugging.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin M

x86: ivybridge: Add more debugging for failures

Add various debug() messages in places where errors occur. This aids with
debugging.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# b8e59974 12-Jul-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-x86


# 9532fe3b 11-Jul-2016 Simon Glass <sjg@chromium.org>

x86: link: Correct a failure in DRAM init

With the change to set up pinctrl after relocation, link fails to boot. Add
a special case in the link code to handle this.

Fixes: d8906c1f (x86: Probe pin

x86: link: Correct a failure in DRAM init

With the change to set up pinctrl after relocation, link fails to boot. Add
a special case in the link code to handle this.

Fixes: d8906c1f (x86: Probe pinctrl driver in cpu_init_r())

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# dc557e9a 18-Jun-2016 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>


# 6d54868e 23-May-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-x86


# 0c2b7eef 11-May-2016 Bin Meng <bmeng.cn@gmail.com>

x86: Unify reserve_arch() for all x86 boards

Instead of asking each platform to provide reserve_arch(),
supply it in arch/x86/cpu/cpu.c in a unified way.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com

x86: Unify reserve_arch() for all x86 boards

Instead of asking each platform to provide reserve_arch(),
supply it in arch/x86/cpu/cpu.c in a unified way.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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# 147ba41d 16-Mar-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Convert to use the common SDRAM code

Adjust the existing implementation to use the new common SDRAM init code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <b

x86: ivybridge: Convert to use the common SDRAM code

Adjust the existing implementation to use the new common SDRAM init code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 8b900a41 12-Mar-2016 Simon Glass <sjg@chromium.org>

x86: Move Intel Management Engine code to a common place

Some of the Intel ME code is common to several Intel CPUs. Move it into a
common location. Add a header file for report_platform.c also.

Sig

x86: Move Intel Management Engine code to a common place

Some of the Intel ME code is common to several Intel CPUs. Move it into a
common location. Add a header file for report_platform.c also.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[squashed in http://patchwork.ozlabs.org/patch/598372/]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

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# 06d336cc 12-Mar-2016 Simon Glass <sjg@chromium.org>

x86: Create a common header for Intel register access

There are several blocks of registers that are accessed from all over the
code on Intel CPUs. These don't currently have their own driver and it

x86: Create a common header for Intel register access

There are several blocks of registers that are accessed from all over the
code on Intel CPUs. These don't currently have their own driver and it is
not clear whether having a driver makes sense.

An example is the Memory Controller Hub (MCH). We map it to a known location
on some Intel chips (mostly those without FSP - Firmware Support Package).

Add a new header file for these registers, and move MCH into it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 88033d73 14-Mar-2016 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-dm


# 3f603cbb 11-Feb-2016 Simon Glass <sjg@chromium.org>

dm: Use uclass_first_device_err() where it is useful

Use this new function in places where it simplifies the code.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 98655f3a 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: Set up a shared syscon numbering schema

Each system controller can have a number to identify it. It can then be
accessed using syscon_get_by_driver_data(). Put this in a shared header
file and

x86: Set up a shared syscon numbering schema

Each system controller can have a number to identify it. It can then be
accessed using syscon_get_by_driver_data(). Put this in a shared header
file and update the only current user.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# fad12961 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Convert report_platform to DM PCI API

Convert these functions to use the driver model PCI API.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.co

x86: ivybridge: Convert report_platform to DM PCI API

Convert these functions to use the driver model PCI API.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# c02a4242 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Convert SDRAM init to use driver model

SDRAM init needs access to the Northbridge controller and the Intel
Management Engine device. Add the latter to the device tree and convert all

x86: ivybridge: Convert SDRAM init to use driver model

SDRAM init needs access to the Northbridge controller and the Intel
Management Engine device. Add the latter to the device tree and convert all
of this code to driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 1641bb8c 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Convert sdram_initialise() to use DM PCI API

Convert this function to use the the driver model PCI API. We just need
to pass in the northbridge device.

Signed-off-by: Simon Glass <s

x86: ivybridge: Convert sdram_initialise() to use DM PCI API

Convert this function to use the the driver model PCI API. We just need
to pass in the northbridge device.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 2588e711 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Convert dram_init() to use DM PCI API

Convert the top part of the DRAM init to use the driver model PCI API.
Further work will complete the transformation.

Signed-off-by: Simon Glas

x86: ivybridge: Convert dram_init() to use DM PCI API

Convert the top part of the DRAM init to use the driver model PCI API.
Further work will complete the transformation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

show more ...


# a69fdc77 23-Oct-2015 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot


# 858dbdf8 22-Oct-2015 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-x86


# 3e45de6e 18-Oct-2015 Bin Meng <bmeng.cn@gmail.com>

x86: ivybridge: Enable the MRC cache

This works correctly now, so enable it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Dropped malloc() and adjusted commit message:
Signed-off-by: Simon Glass <s

x86: ivybridge: Enable the MRC cache

This works correctly now, so enable it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Dropped malloc() and adjusted commit message:
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# fd8f4729 18-Oct-2015 Simon Glass <sjg@chromium.org>

x86: ivybridge: Measure the MRC code execution time

This code takes about 450ms without the MRC cache and about 27ms with the
cache. Add a debug timer so that this time can be displayed.

Signed-off

x86: ivybridge: Measure the MRC code execution time

This code takes about 450ms without the MRC cache and about 27ms with the
cache. Add a debug timer so that this time can be displayed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

show more ...


# 9fbc5ccd 18-Oct-2015 Simon Glass <sjg@chromium.org>

x86: ivybridge: Check the RTC return value

The RTC can fail, so check the return value for reads.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 53327d3e 18-Oct-2015 Simon Glass <sjg@chromium.org>

x86: ivybridge: Use 'ret' instead of 'rcode'

For consistency, use 'ret' to handle a return value.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


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