| e6294e05 | 26-Jul-2016 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Allow microcode to be collated
Generally the microcode is combined into a single block only (and removed
from the device tree) when there are multiple blocks. But this is not a
requi
x86: ivybridge: Allow microcode to be collated
Generally the microcode is combined into a single block only (and removed
from the device tree) when there are multiple blocks. But this is not a
requirement.
Adjust the ivybridge code to avoid assuming this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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|
| 65dd1507 | 16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Add common SDRAM-init code
The code to call the memory reference code is common to several Intel CPUs.
Add common code for performing this init. Intel calls this 'Pre-EFI-Init'
(PEI), where EFI
x86: Add common SDRAM-init code
The code to call the memory reference code is common to several Intel CPUs.
Add common code for performing this init. Intel calls this 'Pre-EFI-Init'
(PEI), where EFI stands for Extensible Firmware Interface.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
show more ...
|