| a3e80904 | 11-Nov-2013 |
Paul Burton <paul.burton@imgtec.com> |
malta: arch/mips/include/asm/malta.h SPDX license tag
This patch replaces the GPL-2.0 text with a GPL-2.0
SPDX-License-Identifier tag, and adds Imagination Technologies copyright
following my recent
malta: arch/mips/include/asm/malta.h SPDX license tag
This patch replaces the GPL-2.0 text with a GPL-2.0
SPDX-License-Identifier tag, and adds Imagination Technologies copyright
following my recent changes.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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| 81f98bbd | 08-Nov-2013 |
Paul Burton <paul.burton@imgtec.com> |
malta: setup PIIX4 interrupt route
Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will
be left disabled. Linux does not set up this routing but relies upon it
having been set up b
malta: setup PIIX4 interrupt route
Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will
be left disabled. Linux does not set up this routing but relies upon it
having been set up by the bootloader, reading back the IRQ lines which
the PIRQ[A:D] signals have been routed to.
This patch routes PIRQA & PIRQB to IRQ 10, and PIRQC & PIRQD to IRQ 11.
This matches the setup used by YAMON.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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| baf37f06 | 08-Nov-2013 |
Paul Burton <paul.burton@imgtec.com> |
malta: support for coreFPGA6 boards
This patch adds support for running on Malta boards using coreFPGA6
core cards, including support for the msc01 system controller used
with them. The system contr
malta: support for coreFPGA6 boards
This patch adds support for running on Malta boards using coreFPGA6
core cards, including support for the msc01 system controller used
with them. The system controller is detected at runtime allowing one
U-boot binary to run on a Malta with either.
Due to the PCI I/O base differing between Maltas using gt64120 & msc01
system controllers, the UART setup is modified slightly. A second UART
is added so that there is one pointing at the correct address for each
system controller. The Malta board then defines its own
default_serial_console function to select the correct one at runtime.
The incorrect UART will simply not function.
Tested on:
- A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both
with and without an L2 cache.
- QEMU.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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| 6c154552 | 09-May-2013 |
Daniel Schwierzeck <daniel.schwierzeck@gmail.com> |
MIPS: bootm: add support for generic relocation of init ramdisks
All linux kernels after v2.6 require a page-aligned location of
an external init ramdisk. Enable CONFIG_SYS_BOOT_RAMDISK_HIGH to
supp
MIPS: bootm: add support for generic relocation of init ramdisks
All linux kernels after v2.6 require a page-aligned location of
an external init ramdisk. Enable CONFIG_SYS_BOOT_RAMDISK_HIGH to
support this with the generic U-Boot relocation code.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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| ac12984d | 22-May-2013 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: qemu-malta: setup GT64120 registers as done by YAMON
Move the GT64120 register base to 0x1be00000
and setup PCI BAR registers as done by the
original YAMON bootloader.
This is needed for runn
MIPS: qemu-malta: setup GT64120 registers as done by YAMON
Move the GT64120 register base to 0x1be00000
and setup PCI BAR registers as done by the
original YAMON bootloader.
This is needed for running Linux kernel.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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| 01564315 | 22-May-2013 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: qemu-malta: add reset support
The MIPS Malta board has a SOFTRES register. Writing a
magic value into that register initiates a board reset.
Use this feature to implement reset support.
Sign
MIPS: qemu-malta: add reset support
The MIPS Malta board has a SOFTRES register. Writing a
magic value into that register initiates a board reset.
Use this feature to implement reset support.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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| e1208c2f | 08-Jun-2013 |
Daniel Schwierzeck <daniel.schwierzeck@gmail.com> |
MIPS: asm/errno.h: switch to asm-generic/errno.h
This fixes several warnings like
In file included from ./u-boot/include/linux/mtd/mtd.h:13:0,
from env_onenand.c:37:
./u-boot/build
MIPS: asm/errno.h: switch to asm-generic/errno.h
This fixes several warnings like
In file included from ./u-boot/include/linux/mtd/mtd.h:13:0,
from env_onenand.c:37:
./u-boot/build/vct_platinumavc_onenand_small/include2/asm/errno.h:52:0: warning: "ENOMSG" redefined [enabled by default]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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| 04380c65 | 12-Feb-2013 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: add dynamic relocation support
The code handles relocation entries with the
following relocation types only:
mips32: R_MIPS_REL32
mips64: R_MIPS_REL+R_MIPS_64
xburst: R_MIPS_REL32
Other
MIPS: add dynamic relocation support
The code handles relocation entries with the
following relocation types only:
mips32: R_MIPS_REL32
mips64: R_MIPS_REL+R_MIPS_64
xburst: R_MIPS_REL32
Other relocation entries are skipped without
processing. The code must be extended if other
relocation types must be supported.
Add -pie to LDFLAGS_FINAL to generate the .rel.dyn
fixup table, which will be applied to the relocated
image before transferring control to it.
The CONFIG_NEEDS_MANUAL_RELOC is not needed
after the patch, so remove that as well.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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