| 5f048e57 | 21-Feb-2018 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: smccc: add more interfaces support
These interfaces are moved from kernel 4.4: ./drivers/firmware/rockchip_sip.c
Only those maybe used in U-Boot are moved.
Change-Id: I5896606c992056199f
rockchip: smccc: add more interfaces support
These interfaces are moved from kernel 4.4: ./drivers/firmware/rockchip_sip.c
Only those maybe used in U-Boot are moved.
Change-Id: I5896606c992056199f116692cca3c6d9530fd2f9 Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
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| f67f522b | 05-Feb-2018 |
Finley Xiao <finley.xiao@rock-chips.com> |
rockchip: clk: px30: Add support for i2c, pwm, spi and saradc
Change-Id: I81e1bf5776952da62dcdc7fdf58587ba0ddf20ae Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> |
| 89f991f8 | 06-Feb-2018 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: px30: fix clk and pmugrf issue
Change-Id: I481abacc5f69e645b4b3ca2cc5b27bf6cc3a6ca7 Signed-off-by: Joseph Chen <chenjh@rock-chips.com> |
| a60961a3 | 22-Jan-2018 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px30: add clock driver
Add basic clock for px30 which including cpu, bus, emmc clock init.
Change-Id: I43a1eaee20bda330ce4ff0556b3fda14a0451681 Signed-off-by: Kever Yang <kever.yang@rock-
rockchip: px30: add clock driver
Add basic clock for px30 which including cpu, bus, emmc clock init.
Change-Id: I43a1eaee20bda330ce4ff0556b3fda14a0451681 Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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| 95b95808 | 01-Feb-2018 |
Zhihuan He <huan.he@rock-chips.com> |
rockchip: add rv1108 sdram driver
add rv1108 sdram driver so we can set up sdram in SPL
Change-Id: Iecc6e896921b68ec97bf7d890a61a4ff75d6876b Signed-off-by: Zhihuan He <huan.he@rock-chips.com> |
| 24b30f4f | 01-Feb-2018 |
Zhihuan He <huan.he@rock-chips.com> |
rockchip: add rv1108 pctl and phy
add rv1108 pctl and phy code
Change-Id: I744b1d47e4e9ac611caeb7457f0ece57d649cdda Signed-off-by: Zhihuan He <huan.he@rock-chips.com> |
| 10e73f7b | 22-Jan-2018 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px30: add new soc support
The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35 including NEON and GPU, Mali-400 graphics, several DDR3 options and video codec support. Peripher
rockchip: px30: add new soc support
The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35 including NEON and GPU, Mali-400 graphics, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
Change-Id: I0c3c58aa654d42291ae902593285bc974cda19d5 Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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| c876650a | 05-Feb-2018 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: add chip info interface
Change-Id: I916ef9d22370bf464569bf400e0cab61d6107d6a Signed-off-by: Joseph Chen <chenjh@rock-chips.com> |
| 7a6ed8e8 | 22-Jan-2018 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: declear boot_devices in bootrom.h
boot_devices may defined in soc file, and used in board file, we need to delear it in header file.
Change-Id: I621dac73d0e00379da49b78b3a9079e30642881a S
rockchip: declear boot_devices in bootrom.h
boot_devices may defined in soc file, and used in board file, we need to delear it in header file.
Change-Id: I621dac73d0e00379da49b78b3a9079e30642881a Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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| b95943f1 | 20-Jan-2018 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3288: move configure_l2ctlr back to rk3288
The configure_l2ctlr() is used only by rk3288, do not need to locate in sys_proto.h
Change-Id: I98f8cffdbc990e3fcf19f41ca53ff5fd25155e63 Signe
rockchip: rk3288: move configure_l2ctlr back to rk3288
The configure_l2ctlr() is used only by rk3288, do not need to locate in sys_proto.h
Change-Id: I98f8cffdbc990e3fcf19f41ca53ff5fd25155e63 Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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| c85f17a6 | 16-Jan-2018 |
Kever Yang <kever.yang@rock-chips.com> |
Revert "rockchip: rk322x: speed up the emmc and the cpu."
This reverts commit 4a872f4aa8369cafafa5dca780687b8552a7b5cb. rk3229 evb and echo can not work with ddr52 enable.
Change-Id: Ia22b30ffe40de
Revert "rockchip: rk322x: speed up the emmc and the cpu."
This reverts commit 4a872f4aa8369cafafa5dca780687b8552a7b5cb. rk3229 evb and echo can not work with ddr52 enable.
Change-Id: Ia22b30ffe40de6f6e74e50ec5fd52e3715006de0 Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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| 9d33a67d | 18-Dec-2017 |
Kever Yang <kever.yang@rock-chips.com> |
UPSTREAM: rockchip: update boot0 hook
Rockchip SoCs only need boot0 hook at SPL, and the U-Boot proper do not need it.
The very beginning of U-Boot proper is different between armv7 and armv8: armv
UPSTREAM: rockchip: update boot0 hook
Rockchip SoCs only need boot0 hook at SPL, and the U-Boot proper do not need it.
The very beginning of U-Boot proper is different between armv7 and armv8: armv7 start with ARM_VECTORS while armv8 start with 'b reset'.
Here is the map of very beginning for all cases: armv7 SPL: TAG(overwrite 'b 1f')+'b reset' + ARM_VECTORS armv7 U-Boot: ARM_VECTORS armv8 SPL: TAG(overwrite 'b 1f')+'b reset' + Reserved_iram(rk3399) armv8 U-Boot: 'b reset'
Change-Id: I433ccd2e09f32fa3f1892953d67650a99dac39bc Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 270288544e12c7c98e4bc9a5b121517ba0a959d2)
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| 82c369d0 | 05-Jan-2018 |
Kever Yang <kever.yang@rock-chips.com> |
Revert "rockchip: update boot0 hook"
This reverts commit 7a4d1b540601cf674de4f85400b71859f689c9b3.
Change-Id: I6f2f5ac92b83129a816a409f669c4ceb2c36b64b Signed-off-by: Kever Yang <kever.yang@rock-ch
Revert "rockchip: update boot0 hook"
This reverts commit 7a4d1b540601cf674de4f85400b71859f689c9b3.
Change-Id: I6f2f5ac92b83129a816a409f669c4ceb2c36b64b Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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| 8a04b1c1 | 28-Nov-2017 |
Peng Fan <peng.fan@nxp.com> |
UPSTREAM: armv8: mmu: fix page table mapping
To page mapping the lowest 2 bits needs to be 0x3. If not fix this, the final lowest 3 bits for page mapping is 0x1 which is marked as reserved.
Change-
UPSTREAM: armv8: mmu: fix page table mapping
To page mapping the lowest 2 bits needs to be 0x3. If not fix this, the final lowest 3 bits for page mapping is 0x1 which is marked as reserved.
Change-Id: I5ac722421b46514736d93452aab68debe8aabfe5 Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 90351547ceeb76c1337757c51af0fb5a2c30bd02)
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| 43ae10fd | 01-Dec-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
UPSTREAM: rockchip: clk: rk3128: fix DCLK_VOP_DIV_CON_MASK
The DCLK_VOP_DIV_CON_MASK should cover only bits 8 through 15. Fix this to remove an "integer-overflow on shifted constant" warning.
Fixes
UPSTREAM: rockchip: clk: rk3128: fix DCLK_VOP_DIV_CON_MASK
The DCLK_VOP_DIV_CON_MASK should cover only bits 8 through 15. Fix this to remove an "integer-overflow on shifted constant" warning.
Fixes: 9246d9e ("rockchip: rk3128: add clock driver") Change-Id: I6132623ce069ec6c6cd59a01580e795142864862 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 4fc495e9e2e497afee383294a6ee9212e9a8bd73)
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| b10789f2 | 01-Dec-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
UPSTREAM: rockchip: clk: rk3128: fix NANDC_PLL_SEL_MASK
The PLL selector field for NANDC is only 2 bits wide. This fixes an 'int-overflow on shift' warning.
Fixes: 9246d9e ("rockchip: rk3128: add c
UPSTREAM: rockchip: clk: rk3128: fix NANDC_PLL_SEL_MASK
The PLL selector field for NANDC is only 2 bits wide. This fixes an 'int-overflow on shift' warning.
Fixes: 9246d9e ("rockchip: rk3128: add clock driver") Change-Id: I4d6d7c51633eb7cd0fbfb1c6b7c501cf8c0fcf81 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit cd401abcd532c59cdaaf6ffeed762386c1813e58)
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| 1b48bbdd | 21-Nov-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
UPSTREAM: bitops: collect BIT macros to include/linux/bitops.h
Same macros are defined in various places. Collect them into include/linux/bitops.h like Linux.
Change-Id: I81d12e8c8151c6eb29499d2b5
UPSTREAM: bitops: collect BIT macros to include/linux/bitops.h
Same macros are defined in various places. Collect them into include/linux/bitops.h like Linux.
Change-Id: I81d12e8c8151c6eb29499d2b5cd61ed782500492 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit ed3986ca30972c94f0076f88c948406ce030a05c)
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| 25527bfa | 22-Nov-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
UPSTREAM: rockchip: pinctrl: rk3399: add support for I2C8
The RK3399 has a total of 9 I2C controllers. To support these, the enum in periph.h is extended and the mapping from the IRQ numbers to the
UPSTREAM: rockchip: pinctrl: rk3399: add support for I2C8
The RK3399 has a total of 9 I2C controllers. To support these, the enum in periph.h is extended and the mapping from the IRQ numbers to the peripheral-ids is extended to ensure that pinctrl requests are passed through to the function configuring the I2C pins.
For I2C8, the pinctrl is implemented and tested (on a RK3399-Q7) using communication with the FAN53555 connected on I2C8.
Change-Id: I7ad9400f05d3ee89263ecd2bcc391483934b6c74 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 8c2bb589e29d5cb89e10c3ddd23b28d949fa9693)
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| f00ac1e5 | 03-Nov-2017 |
Stephen Warren <swarren@nvidia.com> |
UPSTREAM: arm64: support running at addr other than linked to
This is required in the case where U-Boot is typically loaded and run at a particular address, but for some reason the RAM at that locat
UPSTREAM: arm64: support running at addr other than linked to
This is required in the case where U-Boot is typically loaded and run at a particular address, but for some reason the RAM at that location is not available, e.g. due to memory fragmentation loading other boot binaries or firmware, splitting an SMP complex between various different OSs without using e.g. the EL2 second-stage page tables to hide the memory asignments, or due to known ECC failures.
Change-Id: I2fd535325517921c6036188b74ab4facd37b7118 Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 49e93875a62fb9e96a4a7483b9bd5d8ae27ea76e)
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| ee341319 | 25-Sep-2017 |
zijun_hu <zijun_hu@htc.com> |
UPSTREAM: ARMv8: make master CPU checking logic more clear
macro branch_if_master checks master CPU via (Aff3 & (Aff2:Aff1:Aff0)) it is simple but a little obscure.
fix by checking Affx fields with
UPSTREAM: ARMv8: make master CPU checking logic more clear
macro branch_if_master checks master CPU via (Aff3 & (Aff2:Aff1:Aff0)) it is simple but a little obscure.
fix by checking Affx fields within MPIDR_EL1 directly.
Change-Id: I4ab4eca6620ae4b152d637a9c8cca40e4ad6ea7d Signed-off-by: zijun_hu <zijun_hu@htc.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 34f9a9258397b5430adfedd2bf2c6517eb468d29)
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| 7350191d | 14-Sep-2017 |
Paul Burton <paul.burton@imgtec.com> |
UPSTREAM: arm: Use asm-generic/io.h
Convert the arm architecture to make use of the new asm-generic/io.h to provide address mapping functions. As the generic implementations are suitable for arm thi
UPSTREAM: arm: Use asm-generic/io.h
Convert the arm architecture to make use of the new asm-generic/io.h to provide address mapping functions. As the generic implementations are suitable for arm this is primarily a matter of removing code.
This has only been build-tested, feedback from architecture maintainers is welcome.
Change-Id: I26ff51026961b89fc1dbd282c9b3d8c3cf9b4119 Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 8f8e6304df54b36d5971a69ff3de0f6f9ad4bf4e)
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| 5cf14c03 | 29-Sep-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: bootrom: add definitions to retrieve BROM boot-source
The Rockchip BROM allows reading where it booted from from SRAM. This adds the necessary definitions (as received from Kever) for the
rockchip: bootrom: add definitions to retrieve BROM boot-source
The Rockchip BROM allows reading where it booted from from SRAM. This adds the necessary definitions (as received from Kever) for the location of this information in the RK3399's SRAM and naming for the constants used.
Change-Id: Iac090fa74837959ffc4bb42c75328016ee671be1 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 3b4f87735d093463e3b227a07a62996fc0b47b53)
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| 636c3e18 | 27-Sep-2017 |
Jagan Teki <jagan@amarulasolutions.com> |
UPSTREAM: armv7: rk3288: Move configure_l2ctlr to common
configure_l2ctlr will be shared between SPL and TPL so move them into asm/arch/sys_proto.h
Change-Id: I0702c88b1569abb1b65c29923cedbbccaa28a
UPSTREAM: armv7: rk3288: Move configure_l2ctlr to common
configure_l2ctlr will be shared between SPL and TPL so move them into asm/arch/sys_proto.h
Change-Id: I0702c88b1569abb1b65c29923cedbbccaa28a33a Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit a982d5156db0587f5118a118c7e9f18d4c70891d)
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| 2bae3f50 | 27-Sep-2017 |
Jagan Teki <jagan@amarulasolutions.com> |
UPSTREAM: armv7: Move L2CTLR read/write to common
L2CTLR read/write functions are common to armv7 so, move them in to include/asm/armv7.h and use them where ever it need.
Cc: Tom Warren <twarren@nv
UPSTREAM: armv7: Move L2CTLR read/write to common
L2CTLR read/write functions are common to armv7 so, move them in to include/asm/armv7.h and use them where ever it need.
Cc: Tom Warren <twarren@nvidia.com> Change-Id: I1321528829cb523dbb2500f64e4b18d70f7ec5bc Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [Backed out the change to arch/arm/mach-tegra/cache.c:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit d9a7dcf5b8da5460a08305cdc9452f4e62dd34e5)
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| 9ff3d014 | 25-Aug-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
UPSTREAM: dma: import linux/dma-direction.h to consolidate enum dma_data_direction
Import include/linux/dma-direction.h from Linux 4.13-rc7 and delete duplicated definitions of enum dma_data_directi
UPSTREAM: dma: import linux/dma-direction.h to consolidate enum dma_data_direction
Import include/linux/dma-direction.h from Linux 4.13-rc7 and delete duplicated definitions of enum dma_data_direction.
Change-Id: I9c6569e4ab91ac82fb1c99a38003a1ac48061813 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit b27af39935855c88ef2203dcfc1ff54e013237c4)
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