| 2c5b8756 | 27-Oct-2011 |
Sanjeev Premi <premi@ti.com> |
omap3: mem: Move comments next to definitions
Calculations for ACTIM_CTRLA amd ACTIM_CTRLB values
are defined in 'header' style comments.
Moved them along with definitions. Should help maintain
con
omap3: mem: Move comments next to definitions
Calculations for ACTIM_CTRLA amd ACTIM_CTRLB values
are defined in 'header' style comments.
Moved them along with definitions. Should help maintain
consistency between comments and code if any of these
are tweaked in future.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
show more ...
|
| f883c5d8 | 27-Oct-2011 |
Sanjeev Premi <premi@ti.com> |
omap3: mem: Clean-up whitespaces
Consistent use of TABs and align definitions with
neighbouring code.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-b
omap3: mem: Clean-up whitespaces
Consistent use of TABs and align definitions with
neighbouring code.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
show more ...
|
| e3596e35 | 27-Oct-2011 |
Sanjeev Premi <premi@ti.com> |
omap3: mem: Define and use common macros
Define common macros to arrive at the values of registers
SDRC_ACTIM_CTRLA and SDRC_ACTIM_CTRLB for different memory
types.
This doesn't make any real chang
omap3: mem: Define and use common macros
Define common macros to arrive at the values of registers
SDRC_ACTIM_CTRLA and SDRC_ACTIM_CTRLB for different memory
types.
This doesn't make any real change in the execution but
helps readability.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
show more ...
|
| 13402868 | 07-Oct-2011 |
Stefano Babic <sbabic@denx.de> |
VIDEO: davinci: add framebuffer to da8xx
The patch is a port from the framebuffer driver
of the Linux driver drivers/video/da8xx-fb.c, used
on davinci da8xx and OMAP-L138 boards.
As base for the po
VIDEO: davinci: add framebuffer to da8xx
The patch is a port from the framebuffer driver
of the Linux driver drivers/video/da8xx-fb.c, used
on davinci da8xx and OMAP-L138 boards.
As base for the port, the following commit (last changes
for this driver at the moment in the Linux kernel tree)
was taken:
commit 1db41e032d563eb47deab40dc5595be306b143ba
Author: axel lin <axel.lin@gmail.com>
Date: Tue Feb 22 01:52:42 2011 +0000
video: da8xx-fb: fix section mismatch warning
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
show more ...
|
| 829f9178 | 04-Oct-2011 |
Stefano Babic <sbabic@denx.de> |
ARM: Davinci: added missing registers to hardware.h
The hardware base address for ther LCD configuration
registers is missing, as well as some syscfg registers.
Signed-off-by: Stefano Babic <sbabic
ARM: Davinci: added missing registers to hardware.h
The hardware base address for ther LCD configuration
registers is missing, as well as some syscfg registers.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
show more ...
|
| ca1646b8 | 04-Oct-2011 |
Bastian Ruppert <Bastian.Ruppert@Sewerin.de> |
Davinci: ea20: set GPIOs to hold MII-Phy in reset and set UART0-Switch for console
Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: dzu@d
Davinci: ea20: set GPIOs to hold MII-Phy in reset and set UART0-Switch for console
Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: dzu@denx.de
CC: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
show more ...
|
| f9fc237f | 04-Oct-2011 |
Bastian Ruppert <Bastian.Ruppert@Sewerin.de> |
Davinci: ea20: set console on UART0
Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sa
Davinci: ea20: set console on UART0
Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
show more ...
|
| 8bfe325c | 01-Nov-2011 |
Heiko Schocher <hs@denx.de> |
arm926ejs, davinci: add missing spi defines for dm365
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by:
arm926ejs, davinci: add missing spi defines for dm365
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
show more ...
|
| 29b0bef5 | 01-Nov-2011 |
Heiko Schocher <hs@denx.de> |
arm926ejs, davinci: add cpuinfo for dm365
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paul
arm926ejs, davinci: add cpuinfo for dm365
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
show more ...
|
| 53d3b2ce | 01-Nov-2011 |
Heiko Schocher <hs@denx.de> |
arm, davinci: add lowlevel function for dm365 soc
used for booting (for example) from NAND using spl code.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
arm, davinci: add lowlevel function for dm365 soc
used for booting (for example) from NAND using spl code.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
show more ...
|
| 4e28ede2 | 01-Nov-2011 |
Heiko Schocher <hs@denx.de> |
arm, davinci: add header files for dm365
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Christian Riesch <christ
arm, davinci: add header files for dm365
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
show more ...
|
| fab19c14 | 12-Oct-2011 |
Christian Riesch <christian.riesch@omicron.at> |
arm, davinci: Add function lpsc_syncreset()
This patch adds a function lpsc_syncreset that allows setting a
lpsc module into Sync Reset state.
Signed-off-by: Christian Riesch <christian.riesch@omic
arm, davinci: Add function lpsc_syncreset()
This patch adds a function lpsc_syncreset that allows setting a
lpsc module into Sync Reset state.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
show more ...
|
| abbbbdd7 | 01-Nov-2011 |
Lei Wen <[leiwen@marvell.com]> |
armada100: define CONFIG_SYS_CACHELINE_SIZE
By default, on Armada100 SoC DCache Lnd ICache line
lengths are 32 bytes long
Signed-off-by: Lei Wen <leiwen@marvell.com> |
| 0caac5f4 | 01-Nov-2011 |
Lei Wen <[leiwen@marvell.com]> |
pantheon: define CONFIG_SYS_CACHELINE_SIZE
By default, on Pantheon SoC DCache Lnd ICache line
lengths are 32 bytes long
Signed-off-by: Lei Wen <leiwen@marvell.com> |
| f779d739 | 31-Oct-2011 |
Michael Walle <[michael@walle.cc]> |
kirkwood: define CONFIG_SYS_CACHELINE_SIZE
By default, on Kirkwood SoC DCache Lnd ICache line
lengths are 32 bytes long
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Prafulla Wadaskar <prafull
kirkwood: define CONFIG_SYS_CACHELINE_SIZE
By default, on Kirkwood SoC DCache Lnd ICache line
lengths are 32 bytes long
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
show more ...
|
| 35b541c8 | 21-Oct-2011 |
Tom Rini <trini@ti.com> |
am335x: Drop board_sysinfo struct
This isn't used presumably should be a typedef if needed later.
Signed-off-by: Tom Rini <trini@ti.com> |
| a6d9de43 | 27-Oct-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: add ESD control registers
This allows to initialize DDR memory in C code.
Currently all mx31 boards use assembler code (lowlevel_init.S)
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
A
mx31: add ESD control registers
This allows to initialize DDR memory in C code.
Currently all mx31 boards use assembler code (lowlevel_init.S)
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Stefano Babic <sbabic@denx.de>
show more ...
|
| d121d201 | 27-Oct-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: define pins and init for UART2 and CSPI3
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Stefano Babic <sbabic@denx.de> |
| 6d0fb3db | 20-Oct-2011 |
Fabio Estevam <festevam@gmail.com> |
mx31: Introduce mx31_set_gpr function
Introduce mx31_set_gpr function for setting the GPR (General Purpose Register) on MX31.
This function can be useful for setting a group of pins into tied to so
mx31: Introduce mx31_set_gpr function
Introduce mx31_set_gpr function for setting the GPR (General Purpose Register) on MX31.
This function can be useful for setting a group of pins into tied to some specific peripherals.
Reuse this function from the linux kernel.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
show more ...
|
| f6dc192e | 06-Sep-2011 |
Stefano Babic <sbabic@denx.de> |
MX35: Drop unnecessary prototypes from imx-regs.h
Signed-off-by: Stefano Babic <sbabic@denx.de> |
| 324a131e | 05-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
MX35: factorize common assembly code
Signed-off-by: Stefano Babic <sbabic@denx.de> |
| e0a83cc1 | 05-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
MX35: add pins definition for UART3
Signed-off-by: Stefano Babic <sbabic@denx.de> |
| 9d940442 | 05-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
MX35: added ESDC structure to imx-regs
The structure and PLL defines are added to
the imx-regs.h file and dropped from board
header files.
Signed-off-by: Stefano Babic <sbabic@denx.de> |
| 07133f2e | 02-Nov-2011 |
Marek Vasut <marek.vasut@gmail.com> |
PXA: Add MMC driver using the generic MMC framework
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> |
| 3d90a2ad | 03-Oct-2011 |
Lei Wen <leiwen@marvell.com> |
ARM: pantheon: add mmc definition
Signed-off-by: Lei Wen <leiwen@marvell.com> |