1 /* 2 * (C) Copyright 2010 3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de 4 * 5 * Based on da850evm.c, original Copyrights follow: 6 * 7 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ 8 * 9 * Based on da830evm.c. Original Copyrights follow: 10 * 11 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com> 12 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License as published by 16 * the Free Software Foundation; either version 2 of the License, or 17 * (at your option) any later version. 18 * 19 * This program is distributed in the hope that it will be useful, 20 * but WITHOUT ANY WARRANTY; without even the implied warranty of 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 * GNU General Public License for more details. 23 * 24 * You should have received a copy of the GNU General Public License 25 * along with this program; if not, write to the Free Software 26 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 27 */ 28 29 #include <common.h> 30 #include <i2c.h> 31 #include <net.h> 32 #include <netdev.h> 33 #include <asm/arch/hardware.h> 34 #include <asm/arch/emif_defs.h> 35 #include <asm/arch/emac_defs.h> 36 #include <asm/io.h> 37 #include <asm/arch/davinci_misc.h> 38 #include <asm/arch/gpio.h> 39 40 DECLARE_GLOBAL_DATA_PTR; 41 42 #define pinmux(x) (&davinci_syscfg_regs->pinmux[x]) 43 44 /* SPI0 pin muxer settings */ 45 static const struct pinmux_config spi1_pins[] = { 46 { pinmux(5), 1, 1 }, 47 { pinmux(5), 1, 2 }, 48 { pinmux(5), 1, 4 }, 49 { pinmux(5), 1, 5 } 50 }; 51 52 /* UART0 pin muxer settings */ 53 static const struct pinmux_config uart_pins[] = { 54 { pinmux(3), 2, 7 }, 55 { pinmux(3), 2, 6 }, 56 { pinmux(3), 2, 4 }, 57 { pinmux(3), 2, 5 } 58 }; 59 60 #ifdef CONFIG_DRIVER_TI_EMAC 61 #define HAS_RMII 1 62 static const struct pinmux_config emac_pins[] = { 63 { pinmux(14), 8, 2 }, 64 { pinmux(14), 8, 3 }, 65 { pinmux(14), 8, 4 }, 66 { pinmux(14), 8, 5 }, 67 { pinmux(14), 8, 6 }, 68 { pinmux(14), 8, 7 }, 69 { pinmux(15), 8, 1 }, 70 { pinmux(4), 8, 0 }, 71 { pinmux(4), 8, 1 } 72 }; 73 #endif 74 75 #ifdef CONFIG_NAND_DAVINCI 76 const struct pinmux_config nand_pins[] = { 77 { pinmux(7), 1, 1 }, 78 { pinmux(7), 1, 2 }, 79 { pinmux(7), 1, 4 }, 80 { pinmux(7), 1, 5 }, 81 { pinmux(9), 1, 0 }, 82 { pinmux(9), 1, 1 }, 83 { pinmux(9), 1, 2 }, 84 { pinmux(9), 1, 3 }, 85 { pinmux(9), 1, 4 }, 86 { pinmux(9), 1, 5 }, 87 { pinmux(9), 1, 6 }, 88 { pinmux(9), 1, 7 }, 89 { pinmux(12), 1, 5 }, 90 { pinmux(12), 1, 6 } 91 }; 92 #endif 93 94 const struct pinmux_config gpio_pins[] = { 95 { pinmux(13), 8, 0 }, /* GPIO6[15] RESETOUTn on SOM*/ 96 { pinmux(13), 8, 5 }, /* GPIO6[10] U0_SW0 on EA20-00101_2*/ 97 { pinmux(13), 8, 3 } /* GPIO6[12] U0_SW1 on EA20-00101_2*/ 98 }; 99 100 static const struct pinmux_resource pinmuxes[] = { 101 #ifdef CONFIG_SPI_FLASH 102 PINMUX_ITEM(spi1_pins), 103 #endif 104 PINMUX_ITEM(uart_pins), 105 #ifdef CONFIG_NAND_DAVINCI 106 PINMUX_ITEM(nand_pins), 107 #endif 108 }; 109 110 static const struct lpsc_resource lpsc[] = { 111 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ 112 { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ 113 { DAVINCI_LPSC_EMAC }, /* image download */ 114 { DAVINCI_LPSC_UART0 }, /* console */ 115 { DAVINCI_LPSC_GPIO }, 116 }; 117 118 int board_init(void) 119 { 120 struct davinci_gpio *gpio6_base = 121 (struct davinci_gpio *)DAVINCI_GPIO_BANK67; 122 123 /* PinMux for GPIO */ 124 if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0) 125 return 1; 126 127 /* Set the RESETOUTn low */ 128 writel((readl(&gpio6_base->set_data) & ~(1 << 15)), 129 &gpio6_base->set_data); 130 writel((readl(&gpio6_base->dir) & ~(1 << 15)), &gpio6_base->dir); 131 132 /* Set U0_SW0 low for UART0 as console*/ 133 writel((readl(&gpio6_base->set_data) & ~(1 << 10)), 134 &gpio6_base->set_data); 135 writel((readl(&gpio6_base->dir) & ~(1 << 10)), &gpio6_base->dir); 136 137 /* Set U0_SW1 low for UART0 as console*/ 138 writel((readl(&gpio6_base->set_data) & ~(1 << 12)), 139 &gpio6_base->set_data); 140 writel((readl(&gpio6_base->dir) & ~(1 << 12)), &gpio6_base->dir); 141 142 #ifndef CONFIG_USE_IRQ 143 irq_init(); 144 #endif 145 146 #ifdef CONFIG_NAND_DAVINCI 147 /* 148 * NAND CS setup - cycle counts based on da850evm NAND timings in the 149 * Linux kernel @ 25MHz EMIFA 150 */ 151 writel((DAVINCI_ABCR_WSETUP(0) | 152 DAVINCI_ABCR_WSTROBE(0) | 153 DAVINCI_ABCR_WHOLD(0) | 154 DAVINCI_ABCR_RSETUP(0) | 155 DAVINCI_ABCR_RSTROBE(1) | 156 DAVINCI_ABCR_RHOLD(0) | 157 DAVINCI_ABCR_TA(0) | 158 DAVINCI_ABCR_ASIZE_8BIT), 159 &davinci_emif_regs->ab2cr); /* CS3 */ 160 #endif 161 162 /* arch number of the board */ 163 gd->bd->bi_arch_number = MACH_TYPE_EA20; 164 165 /* address of boot parameters */ 166 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; 167 168 /* 169 * Power on required peripherals 170 * ARM does not have access by default to PSC0 and PSC1 171 * assuming here that the DSP bootloader has set the IOPU 172 * such that PSC access is available to ARM 173 */ 174 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) 175 return 1; 176 177 /* setup the SUSPSRC for ARM to control emulation suspend */ 178 writel(readl(&davinci_syscfg_regs->suspsrc) & 179 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | 180 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | 181 DAVINCI_SYSCFG_SUSPSRC_UART0), 182 &davinci_syscfg_regs->suspsrc); 183 184 /* configure pinmux settings */ 185 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) 186 return 1; 187 188 #ifdef CONFIG_DRIVER_TI_EMAC 189 if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0) 190 return 1; 191 192 davinci_emac_mii_mode_sel(HAS_RMII); 193 #endif /* CONFIG_DRIVER_TI_EMAC */ 194 195 /* enable the console UART */ 196 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | 197 DAVINCI_UART_PWREMU_MGMT_UTRST), 198 &davinci_uart0_ctrl_regs->pwremu_mgmt); 199 200 return 0; 201 } 202 203 #ifdef CONFIG_DRIVER_TI_EMAC 204 205 /* 206 * Initializes on-board ethernet controllers. 207 */ 208 int board_eth_init(bd_t *bis) 209 { 210 if (!davinci_emac_initialize()) { 211 printf("Error: Ethernet init failed!\n"); 212 return -1; 213 } 214 215 /* 216 * This board has a RMII PHY. However, the MDC line on the SOM 217 * must not be disabled (there is no MII PHY on the 218 * baseboard) via the GPIO2[6], because this pin 219 * disables at the same time the SPI flash. 220 */ 221 222 return 0; 223 } 224 #endif /* CONFIG_DRIVER_TI_EMAC */ 225